SPU Options - Using the GNU Compiler Collection (GCC)
Description: Using the GNU Compiler Collection (GCC)

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#### 3.17.40 SPU Options

These ‘`-m`’ options are supported on the SPU:

`-mwarn-reloc`
`-merror-reloc`
  The loader for SPU does not handle dynamic relocations. By default, GCC will give an error when it generates code that requires a dynamic relocation. `-mno-error-reloc` disables the error, `-mwarn-reloc` will generate a warning instead.
`-msafe-dma`
`-munsafe-dma`
  Instructions which initiate or test completion of DMA must not be reordered with respect to loads and stores of the memory which is being accessed. Users typically address this problem using the volatile keyword, but that can lead to inefficient code in places where the memory is known to not change. Rather than mark the memory as volatile we treat the DMA instructions as potentially effecting all memory. With `-munsafe-dma` users must use the volatile keyword to protect memory accesses.
`-mbranch-hints`
  By default, GCC will generate a branch hint instruction to avoid pipeline stalls for always taken or probably taken branches. A hint will not be generated closer than 8 instructions away from its branch. There is little reason to disable them, except for debugging purposes, or to make an object a little bit smaller.
`-msmall-mem`
`-mlarge-mem`
  By default, GCC generates code assuming that addresses are never larger than 18 bits. With `-mlarge-mem` code is generated that assumes a full 32 bit address.
`-mstdmain`
  By default, GCC links against startup code that assumes the SPU-style main function interface (which has an unconventional parameter list). With `-mstdmain`, GCC will link your program against startup code that assumes a C99-style interface to `main`, including a local copy of `argv` strings.
`-mfixed-range=`register-range
  Generate code treating the given register range as fixed registers. A fixed register is one that the register allocator can not use. This is useful when compiling kernel code. A register range is specified as two registers separated by a dash. Multiple register ranges can be specified separated by a comma.
`-mea32`
`-mea64`
  Compile code assuming that pointers to the PPU address space accessed via the `__ea` named address space qualifier are either 32 or 64 bits wide. The default is 32 bits. As this is an ABI changing option, all object code in an executable must be compiled with the same setting.
`-maddress-space-conversion`
`-mno-address-space-conversion`
  Allow/disallow treating the `__ea` address space as superset of the generic address space. This enables explicit type casts between `__ea` and generic pointer as well as implicit conversions of generic pointers to `__ea` pointers. The default is to allow address space pointer conversions.
`-mcache-size=`cache-size
  This option controls the version of libgcc that the compiler links to an executable and selects a software-managed cache for accessing variables in the `__ea` address space with a particular cache size. Possible options for cache-size are ‘`8`’, ‘`16`’, ‘`32`’, ‘`64`’ and ‘`128`’. The default cache size is 64KB.
`-matomic-updates`
`-mno-atomic-updates`
  This option controls the version of libgcc that the compiler links to an executable and selects whether atomic updates to the software-managed cache of PPU-side variables are used. If you use atomic updates, changes to a PPU variable from SPU code using the `__ea` named address space qualifier will not interfere with changes to other PPU variables residing in the same cache line from PPU code. If you do not use atomic updates, such interference may occur; however, writing back cache lines will be more efficient. The default behavior is to use atomic updates.
`-mdual-nops`
`-mdual-nops=`n
  By default, GCC will insert nops to increase dual issue when it expects it to increase performance. n can be a value from 0 to 10. A smaller n will insert fewer nops. 10 is the default, 0 is the same as `-mno-dual-nops`. Disabled with `-Os`.
`-mhint-max-nops=`n
  Maximum number of nops to insert for a branch hint. A branch hint must be at least 8 instructions away from the branch it is effecting. GCC will insert up to n nops to enforce this, otherwise it will not generate the branch hint.
`-mhint-max-distance=`n
  The encoding of the branch hint instruction limits the hint to be within 256 instructions of the branch it is effecting. By default, GCC makes sure it is within 125.
`-msafe-hints`
  Work around a hardware bug which causes the SPU to stall indefinitely. By default, GCC will insert the `hbrp` instruction to make sure this stall won't happen.