power.h Source File

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power.h
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1 /* Copyright (c) 2006, 2007, 2008 Eric B. Weddington
2 All rights reserved.
3
4 Redistribution and use in source and binary forms, with or without
5 modification, are permitted provided that the following conditions are met:
6
7 * Redistributions of source code must retain the above copyright
8 notice, this list of conditions and the following disclaimer.
9 * Redistributions in binary form must reproduce the above copyright
10 notice, this list of conditions and the following disclaimer in
11 the documentation and/or other materials provided with the
12 distribution.
13 * Neither the name of the copyright holders nor the names of
14 contributors may be used to endorse or promote products derived
15 from this software without specific prior written permission.
16
17 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
21 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 POSSIBILITY OF SUCH DAMAGE. */
28
29 /* $Id: power.h 2254 2011-09-26 15:06:50Z arcanum $ */
30
31 #ifndef _AVR_POWER_H_
32 #define _AVR_POWER_H_ 1
33
34 #include <avr/io.h>
35 #include <stdint.h>
36
37
38 /** \file */
39 /** \defgroup avr_power <avr/power.h>: Power Reduction Management
40
41 \code #include <avr/power.h>\endcode
42
43 Many AVRs contain a Power Reduction Register (PRR) or Registers (PRRx) that
44 allow you to reduce power consumption by disabling or enabling various on-board
45 peripherals as needed.
46
47 There are many macros in this header file that provide an easy interface
48 to enable or disable on-board peripherals to reduce power. See the table below.
49
50 \note Not all AVR devices have a Power Reduction Register (for example
51 the ATmega128). On those devices without a Power Reduction Register, these
52 macros are not available.
53
54 \note Not all AVR devices contain the same peripherals (for example, the LCD
55 interface), or they will be named differently (for example, USART and
56 USART0). Please consult your device's datasheet, or the header file, to
57 find out which macros are applicable to your device.
58
59 */
60
61
62 /** \addtogroup avr_power
63
64 \anchor avr_powermacros
65 <small>
66 <center>
67 <table border="3">
68 <tr>
69 <td width="10%"><strong>Power Macro</strong></td>
70 <td width="15%"><strong>Description</strong></td>
71 <td width="75%"><strong>Applicable for device</strong></td>
72 </tr>
73
74 <tr>
75 <td>power_aca_disable()</td>
76 <td> Disable The Analog Comparator On PortA </td>
77 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega32E5, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
78 </tr>
79
80 <tr>
81 <td>power_aca_enable()</td>
82 <td> Enable The Analog Comparator On PortA </td>
83 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega32E5, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
84 </tr>
85
86 <tr>
87 <td>power_acb_disable()</td>
88 <td> Disable The Analog Comparator On PortB </td>
89 <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
90 </tr>
91
92 <tr>
93 <td>power_acb_enable()</td>
94 <td> Enable The Analog Comparator On PortB </td>
95 <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
96 </tr>
97
98 <tr>
99 <td>power_adc_disable()</td>
100 <td>Disable the Analog to Digital Converter module.</td>
101 <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, ATmega256RFR2, ATmega128RFR2, ATmega64RFR2, ATmega256RFA2, ATmega128RFA2, ATmega64RFA2, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, AT90PWM161, ATmega165, ATmega165A, ATmega165P, ATmega165PA, ATmega325, ATmega325A, ATmega325PA, ATmega3250, ATmega3250A, ATmega3250PA, ATmega645, ATmega645A, ATmega645P, ATmega6450, ATmega6450A, ATmega6450P, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega48, ATmega48A, ATmega48PA, ATmega48P, ATmega88, ATmega88A, ATmega88P, ATmega88PA, ATmega168, ATmega168A, ATmega168P, ATmega168PA, ATmega328, ATmega328P, ATtiny48, ATtiny88, ATtiny828, ATtiny841, ATtiny24, ATtiny24A, ATtiny44, ATtiny44A, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny261A, ATtiny461, ATtiny461A, ATtiny861, ATtiny861A, ATtiny43U, ATmega1284, ATmega1284P, ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272, ATtiny1634, ATtiny4, ATtiny5, ATtiny9, ATtiny10, ATtiny13A, ATtiny20, ATtiny40</td>
102 </tr>
103
104 <tr>
105 <td>power_adc_enable()</td>
106 <td>Enable the Analog to Digital Converter module.</td>
107 <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, ATmega256RFR2, ATmega128RFR2, ATmega64RFR2, ATmega256RFA2, ATmega128RFA2, ATmega64RFA2, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, AT90PWM161, ATmega165, ATmega165A, ATmega165P, ATmega165PA, ATmega325, ATmega325A, ATmega325PA, ATmega3250, ATmega3250A, ATmega3250PA, ATmega645, ATmega645A, ATmega645P, ATmega6450, ATmega6450A, ATmega6450P, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega48, ATmega48A, ATmega48PA, ATmega48P, ATmega88, ATmega88A, ATmega88P, ATmega88PA, ATmega168, ATmega168A, ATmega168P, ATmega168PA, ATmega328, ATmega328P, ATtiny48, ATtiny88, ATtiny828, ATtiny841, ATtiny24, ATtiny24A, ATtiny44, ATtiny44A, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny261A, ATtiny461, ATtiny461A, ATtiny861, ATtiny861A, ATtiny43U, ATmega1284, ATmega1284P, ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272, ATtiny1634, ATtiny4, ATtiny5, ATtiny9, ATtiny10, ATtiny13A, ATtiny20, ATtiny40</td>
108 </tr>
109
110 <tr>
111 <td>power_adca_disable()</td>
112 <td> Disable the Analog to Digital Converter module On PortA </td>
113 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega32E5, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
114 </tr>
115
116 <tr>
117 <td>power_adca_enable()</td>
118 <td> Enable the Analog to Digital Converter module On PortA </td>
119 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega32E5, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
120 </tr>
121
122 <tr>
123 <td>power_adcb_disable()</td>
124 <td> Disable the Analog to Digital Converter module On PortB </td>
125 <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
126 </tr>
127
128 <tr>
129 <td>power_adcb_enable()</td>
130 <td> Enable the Analog to Digital Converter module On PortB </td>
131 <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
132 </tr>
133
134 <tr>
135 <td>power_aes_disable()</td>
136 <td> Disable the AES module </td>
137 <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA, AT90SCR100</td>
138 </tr>
139
140 <tr>
141 <td>power_aes_enable()</td>
142 <td> Enable the AES module </td>
143 <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA, AT90SCR100</td>
144 </tr>
145
146 <tr>
147 <td>power_all_disable()</td>
148 <td>Disable all modules.</td>
149 <td>ATxmega384C3, ATxmega256A3BU, ATxmega16A4U, ATxmega32A4U, ATxmega64A3U, ATxmega64A4U, ATxmega128A3U, ATxmega128A4U, ATxmega192A3U, ATxmega256A3U, ATxmega384C3, ATxmega256A3BU, ATxmega16A4U, ATxmega32A4U, ATxmega64A3U, ATxmega64A4U, ATxmega128A3U, ATxmega128A4U, ATxmega192A3U, ATxmega256A3U, ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega64D4, ATxmega128D4, ATxmega16D4, ATxmega32D4, ATxmega64D3, ATxmega128D3, ATxmega192D3, ATxmega32E5, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA, ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, ATmega256RFR2, ATmega128RFR2, ATmega64RFR2, ATmega256RFA2, ATmega128RFA2, ATmega64RFA2, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, AT90PWM161, ATmega165, ATmega165A, ATmega165P, ATmega165PA, ATmega325, ATmega325A, ATmega325PA, ATmega3250, ATmega3250A, ATmega3250PA, ATmega645, ATmega645A, ATmega645P, ATmega6450, ATmega6450A, ATmega6450P, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega406, ATtiny828, ATtiny841, ATtiny841, ATtiny24, ATtiny24A, ATtiny44, ATtiny44A, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny261A, ATtiny461, ATtiny461A, ATtiny861, ATtiny861A, ATtiny43U, ATmega1284, ATmega1284P, ATmega32HVB, ATmega32HVBREVB, ATmega16HVB, ATmega16HVBREVB, ATmega26HVG, ATmega48HVF, ATA5790, ATA5790N, ATA5795, ATA5831, ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272, ATtiny1634, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2, AT90SCR100, ATtiny4, ATtiny5, ATtiny9, ATtiny10, ATtiny13A, ATtiny20, ATtiny40</td>
150 </tr>
151
152 <tr>
153 <td>power_all_enable()</td>
154 <td>Enable all modules.</td>
155 <td>ATxmega384C3, ATxmega256A3BU, ATxmega16A4U, ATxmega32A4U, ATxmega64A3U, ATxmega64A4U, ATxmega128A3U, ATxmega128A4U, ATxmega192A3U, ATxmega256A3U, ATxmega384C3, ATxmega256A3BU, ATxmega16A4U, ATxmega32A4U, ATxmega64A3U, ATxmega64A4U, ATxmega128A3U, ATxmega128A4U, ATxmega192A3U, ATxmega256A3U, ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega64D4, ATxmega128D4, ATxmega16D4, ATxmega32D4, ATxmega64D3, ATxmega128D3, ATxmega192D3, ATxmega32E5, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA, ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, ATmega256RFR2, ATmega128RFR2, ATmega64RFR2, ATmega256RFA2, ATmega128RFA2, ATmega64RFA2, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, AT90PWM161, ATmega165, ATmega165A, ATmega165P, ATmega165PA, ATmega325, ATmega325A, ATmega325PA, ATmega3250, ATmega3250A, ATmega3250PA, ATmega645, ATmega645A, ATmega645P, ATmega6450, ATmega6450A, ATmega6450P, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega406, ATtiny828, ATtiny841, ATtiny841, ATtiny24, ATtiny24A, ATtiny44, ATtiny44A, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny261A, ATtiny461, ATtiny461A, ATtiny861, ATtiny861A, ATtiny43U, ATmega1284, ATmega1284P, ATmega32HVB, ATmega32HVBREVB, ATmega16HVB, ATmega16HVBREVB, ATmega26HVG, ATmega48HVF, ATA5790, ATA5790N, ATA5795, ATA5831, ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272, ATtiny1634, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2, AT90SCR100, ATtiny4, ATtiny5, ATtiny9, ATtiny10, ATtiny13A, ATtiny20, ATtiny40</td>
156 </tr>
157
158 <tr>
159 <td>power_can_disable()</td>
160 <td> Disable the CAN module </td>
161 <td>ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1</td>
162 </tr>
163
164 <tr>
165 <td>power_can_enable()</td>
166 <td> Enable the CAN module </td>
167 <td>ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1</td>
168 </tr>
169
170 <tr>
171 <td>power_cinterface_disable()</td>
172 <td> Disable the CINTERFACE module </td>
173 <td>ATA5790, ATA5790N, ATA5795</td>
174 </tr>
175
176 <tr>
177 <td>power_cinterface_enable()</td>
178 <td> Enable the CINTERFACE module </td>
179 <td>ATA5790, ATA5790N, ATA5795</td>
180 </tr>
181
182 <tr>
183 <td>power_clock_output_disable()</td>
184 <td>Enable clock output module</td>
185 <td>ATA5831</td>
186 </tr>
187
188 <tr>
189 <td>power_clock_output_enable()</td>
190 <td>Enable clock output module</td>
191 <td>ATA5831</td>
192 </tr>
193
194 <tr>
195 <td>power_cpld_disable()</td>
196 <td> Disable CPLD module </td>
197 <td>ATxmega32E5</td>
198 </tr>
199
200 <tr>
201 <td>power_cpld_enable()</td>
202 <td> Enable CPLD module </td>
203 <td>ATxmega32E5</td>
204 </tr>
205
206 <tr>
207 <td>power_crc_disable()</td>
208 <td>Disable CRC module</td>
209 <td>ATA5831</td>
210 </tr>
211
212 <tr>
213 <td>power_crc_enable()</td>
214 <td>Enable CRC module</td>
215 <td>ATA5831</td>
216 </tr>
217
218 <tr>
219 <td>power_crypto_disable()</td>
220 <td> Disable the CRYPTO module </td>
221 <td>ATA5790, ATA5790N, ATA5795</td>
222 </tr>
223
224 <tr>
225 <td>power_crypto_enable()</td>
226 <td> Enable the CRYPTO module </td>
227 <td>ATA5790, ATA5790N, ATA5795</td>
228 </tr>
229
230 <tr>
231 <td>power_ctm_disable()</td>
232 <td> Disable CTM module </td>
233 <td>ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
234 </tr>
235
236 <tr>
237 <td>power_ctm_enable()</td>
238 <td> Enable CTM module </td>
239 <td>ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
240 </tr>
241
242 <tr>
243 <td>power_daca_disable()</td>
244 <td> Disable the DAC module on PortA </td>
245 <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega32E5, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
246 </tr>
247
248 <tr>
249 <td>power_daca_enable()</td>
250 <td> Enable the DAC module on PortA </td>
251 <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega32E5, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
252 </tr>
253
254 <tr>
255 <td>power_dacb_disable()</td>
256 <td> Disable the DAC module on PortB </td>
257 <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
258 </tr>
259
260 <tr>
261 <td>power_dacb_enable()</td>
262 <td> Enable the DAC module on PortB </td>
263 <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
264 </tr>
265
266 <tr>
267 <td>power_data_fifo_disable()</td>
268 <td>Disable data FIFO</td>
269 <td>ATA5831</td>
270 </tr>
271
272 <tr>
273 <td>power_data_fifo_enable()</td>
274 <td>Enable data FIFO</td>
275 <td>ATA5831</td>
276 </tr>
277
278 <tr>
279 <td>power_dma_disable()</td>
280 <td> Disable the DMA module </td>
281 <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega32E5, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
282 </tr>
283
284 <tr>
285 <td>power_dma_enable()</td>
286 <td> Enable the DMA module </td>
287 <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega32E5, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
288 </tr>
289
290 <tr>
291 <td>power_ebi_disable()</td>
292 <td> Disable the EBI module </td>
293 <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
294 </tr>
295
296 <tr>
297 <td>power_ebi_enable()</td>
298 <td> Enable the EBI module </td>
299 <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
300 </tr>
301
302 <tr>
303 <td>power_evsys_disable()</td>
304 <td> Disable the EVSYS module </td>
305 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega32E5, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
306 </tr>
307
308 <tr>
309 <td>power_evsys_enable()</td>
310 <td> Enable the EVSYS module </td>
311 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega32E5, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
312 </tr>
313
314 <tr>
315 <td>power_hiresc_disable()</td>
316 <td> Disable the HIRES module on PortC </td>
317 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega32E5, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
318 </tr>
319
320 <tr>
321 <td>power_hiresc_enable()</td>
322 <td> Enable the HIRES module on PortC </td>
323 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega32E5, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
324 </tr>
325
326 <tr>
327 <td>power_hiresd_disable()</td>
328 <td> Disable the HIRES module on PortD </td>
329 <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
330 </tr>
331
332 <tr>
333 <td>power_hiresd_enable()</td>
334 <td> Enable the HIRES module on PortD </td>
335 <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
336 </tr>
337
338 <tr>
339 <td>power_hirese_disable()</td>
340 <td> Disable the HIRES module on PortE </td>
341 <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
342 </tr>
343
344 <tr>
345 <td>power_hirese_enable()</td>
346 <td> Enable the HIRES module on PortE </td>
347 <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
348 </tr>
349
350 <tr>
351 <td>power_hiresf_disable()</td>
352 <td> Disable the HIRES module on PortF </td>
353 <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
354 </tr>
355
356 <tr>
357 <td>power_hiresf_enable()</td>
358 <td> Enable the HIRES module on PortF </td>
359 <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
360 </tr>
361
362 <tr>
363 <td>power_hsspi_disable()</td>
364 <td> Disable the HSPPI module </td>
365 <td>AT90SCR100</td>
366 </tr>
367
368 <tr>
369 <td>power_hsspi_enable()</td>
370 <td> Enable the HSPPI module </td>
371 <td>AT90SCR100</td>
372 </tr>
373
374 <tr>
375 <td>power_id_scan_disable()</td>
376 <td>Disable ID Scan</td>
377 <td>ATA5831</td>
378 </tr>
379
380 <tr>
381 <td>power_id_scan_enable()</td>
382 <td>Enable ID Scan</td>
383 <td>ATA5831</td>
384 </tr>
385
386 <tr>
387 <td>power_irdriver_disable()</td>
388 <td> Disable the IRDRIVER module </td>
389 <td>ATA5790, ATA5790N, ATA5795</td>
390 </tr>
391
392 <tr>
393 <td>power_irdriver_enable()</td>
394 <td> Enable the IRDRIVER module </td>
395 <td>ATA5790, ATA5790N, ATA5795</td>
396 </tr>
397
398 <tr>
399 <td>power_kb_disable()</td>
400 <td> Disable the KB module </td>
401 <td>AT90SCR100</td>
402 </tr>
403
404 <tr>
405 <td>power_kb_enable()</td>
406 <td> Enable the KB module </td>
407 <td>AT90SCR100</td>
408 </tr>
409
410 <tr>
411 <td>power_lcd_disable()</td>
412 <td>Disable the LCD module.</td>
413 <td>ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P</td>
414 </tr>
415
416 <tr>
417 <td>power_lcd_enable()</td>
418 <td>Enable the LCD module.</td>
419 <td>ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P</td>
420 </tr>
421
422 <tr>
423 <td>power_lfreceiver_disable()</td>
424 <td> Disable the LFRECEIVER module </td>
425 <td>ATA5790, ATA5790N</td>
426 </tr>
427
428 <tr>
429 <td>power_lfreceiver_enable()</td>
430 <td> Enable the LFRECEIVER module </td>
431 <td>ATA5790, ATA5790N</td>
432 </tr>
433
434 <tr>
435 <td>power_lin_disable()</td>
436 <td> Disable the LIN module </td>
437 <td>ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272</td>
438 </tr>
439
440 <tr>
441 <td>power_lin_enable()</td>
442 <td> Enable the LIN module </td>
443 <td>ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272</td>
444 </tr>
445
446 <tr>
447 <td>power_pga_disable()</td>
448 <td> Disable PGA module </td>
449 <td>ATmega256RFR2, ATmega128RFR2, ATmega64RFR2, ATmega256RFA2, ATmega128RFA2, ATmega64RFA2</td>
450 </tr>
451
452 <tr>
453 <td>power_pga_enable()</td>
454 <td> Enable PGA module </td>
455 <td>ATmega256RFR2, ATmega128RFR2, ATmega64RFR2, ATmega256RFA2, ATmega128RFA2, ATmega64RFA2</td>
456 </tr>
457
458 <tr>
459 <td>power_preamble_rssi_fifo_disable()</td>
460 <td>Disable preamble/RSSI FIFO</td>
461 <td>ATA5831</td>
462 </tr>
463
464 <tr>
465 <td>power_preamble_rssi_fifo_enable()</td>
466 <td>Enable preamble/RSSI FIFO</td>
467 <td>ATA5831</td>
468 </tr>
469
470 <tr>
471 <td>power_psc0_disable()</td>
472 <td>Disable the Power Stage Controller 0 module.</td>
473 <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316</td>
474 </tr>
475
476 <tr>
477 <td>power_psc0_enable()</td>
478 <td>Enable the Power Stage Controller 0 module.</td>
479 <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316</td>
480 </tr>
481
482 <tr>
483 <td>power_psc1_disable()</td>
484 <td>Disable the Power Stage Controller 1 module.</td>
485 <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316</td>
486 </tr>
487
488 <tr>
489 <td>power_psc1_enable()</td>
490 <td>Enable the Power Stage Controller 1 module.</td>
491 <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316</td>
492 </tr>
493
494 <tr>
495 <td>power_psc2_disable()</td>
496 <td>Disable the Power Stage Controller 2 module.</td>
497 <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, AT90PWM161</td>
498 </tr>
499
500 <tr>
501 <td>power_psc2_enable()</td>
502 <td>Enable the Power Stage Controller 2 module.</td>
503 <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, AT90PWM161</td>
504 </tr>
505
506 <tr>
507 <td>power_psc_disable()</td>
508 <td> Disable the Power Stage Controller module </td>
509 <td>ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1</td>
510 </tr>
511
512 <tr>
513 <td>power_psc_enable()</td>
514 <td> Enable the Power Stage Controller module </td>
515 <td>ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1</td>
516 </tr>
517
518 <tr>
519 <td>power_pscr_disable()</td>
520 <td>Disable the Reduced Power Stage Controller module.</td>
521 <td>AT90PWM81, AT90PWM161</td>
522 </tr>
523
524 <tr>
525 <td>power_pscr_enable()</td>
526 <td>Enable the Reduced Power Stage Controller module.</td>
527 <td>AT90PWM81, AT90PWM161</td>
528 </tr>
529
530 <tr>
531 <td>power_ram0_disable()</td>
532 <td> Disable Ram0 module </td>
533 <td>ATmega256RFR2, ATmega128RFR2, ATmega64RFR2, ATmega256RFA2, ATmega128RFA2, ATmega64RFA2</td>
534 </tr>
535
536 <tr>
537 <td>power_ram0_enable()</td>
538 <td> Enable Ram0 module </td>
539 <td>ATmega256RFR2, ATmega128RFR2, ATmega64RFR2, ATmega256RFA2, ATmega128RFA2, ATmega64RFA2</td>
540 </tr>
541
542 <tr>
543 <td>power_ram1_disable()</td>
544 <td> Disable Ram1 module </td>
545 <td>ATmega256RFR2, ATmega128RFR2, ATmega64RFR2, ATmega256RFA2, ATmega128RFA2, ATmega64RFA2</td>
546 </tr>
547
548 <tr>
549 <td>power_ram1_enable()</td>
550 <td> Enable Ram1 module </td>
551 <td>ATmega256RFR2, ATmega128RFR2, ATmega64RFR2, ATmega256RFA2, ATmega128RFA2, ATmega64RFA2</td>
552 </tr>
553
554 <tr>
555 <td>power_ram2_disable()</td>
556 <td> Disable Ram2 module </td>
557 <td>ATmega256RFR2, ATmega128RFR2, ATmega64RFR2, ATmega256RFA2, ATmega128RFA2, ATmega64RFA2</td>
558 </tr>
559
560 <tr>
561 <td>power_ram2_enable()</td>
562 <td> Enable Ram2 module </td>
563 <td>ATmega256RFR2, ATmega128RFR2, ATmega64RFR2, ATmega256RFA2, ATmega128RFA2, ATmega64RFA2</td>
564 </tr>
565
566 <tr>
567 <td>power_ram3_disable()</td>
568 <td> Disable Ram3 module </td>
569 <td>ATmega256RFR2, ATmega128RFR2, ATmega64RFR2, ATmega256RFA2, ATmega128RFA2, ATmega64RFA2</td>
570 </tr>
571
572 <tr>
573 <td>power_ram3_enable()</td>
574 <td> Enable Ram3 module </td>
575 <td>ATmega256RFR2, ATmega128RFR2, ATmega64RFR2, ATmega256RFA2, ATmega128RFA2, ATmega64RFA2</td>
576 </tr>
577
578 <tr>
579 <td>power_receive_dsp_control_disable()</td>
580 <td>Disable Receive DSP control module</td>
581 <td>ATA5831</td>
582 </tr>
583
584 <tr>
585 <td>power_receive_dsp_control_enable()</td>
586 <td>Enable Receive DSP control module</td>
587 <td>ATA5831</td>
588 </tr>
589
590 <tr>
591 <td>power_rssi_buffer_disable()</td>
592 <td>Disable RSSI buffer</td>
593 <td>ATA5831</td>
594 </tr>
595
596 <tr>
597 <td>power_rssi_buffer_enable()</td>
598 <td>Enable RSSI buffer</td>
599 <td>ATA5831</td>
600 </tr>
601
602 <tr>
603 <td>power_rtc_disable()</td>
604 <td> Disable the RTC module </td>
605 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega32E5, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
606 </tr>
607
608 <tr>
609 <td>power_rtc_enable()</td>
610 <td> Enable the RTC module </td>
611 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega32E5, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
612 </tr>
613
614 <tr>
615 <td>power_sci_disable()</td>
616 <td> Disable the SCI module </td>
617 <td>AT90SCR100</td>
618 </tr>
619
620 <tr>
621 <td>power_sci_enable()</td>
622 <td> Enable the SCI module </td>
623 <td>AT90SCR100</td>
624 </tr>
625
626 <tr>
627 <td>power_sequencer_state_machine_disable()</td>
628 <td>Disable power sequencer state machine</td>
629 <td>ATA5831</td>
630 </tr>
631
632 <tr>
633 <td>power_sequencer_state_machine_enable()</td>
634 <td>Enable power sequencer state machine</td>
635 <td>ATA5831</td>
636 </tr>
637
638 <tr>
639 <td>power_spi_disable()</td>
640 <td>Disable the Serial Peripheral Interface module.</td>
641 <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, ATmega256RFR2, ATmega128RFR2, ATmega64RFR2, ATmega256RFA2, ATmega128RFA2, ATmega64RFA2, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, AT90PWM161, ATmega165, ATmega165A, ATmega165P, ATmega165PA, ATmega325, ATmega325A, ATmega325PA, ATmega3250, ATmega3250A, ATmega3250PA, ATmega645, ATmega645A, ATmega645P, ATmega6450, ATmega6450A, ATmega6450P, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega48, ATmega48A, ATmega48PA, ATmega48P, ATmega88, ATmega88A, ATmega88P, ATmega88PA, ATmega168, ATmega168A, ATmega168P, ATmega168PA, ATmega328, ATmega328P, ATtiny48, ATtiny88, ATtiny828, ATtiny841, ATmega1284, ATmega1284P, ATmega32HVB, ATmega32HVBREVB, ATmega16HVB, ATmega16HVBREVB, ATmega26HVG, ATmega48HVF, ATA5790, ATA5790N, ATA5795, ATA5831, ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2, AT90SCR100, ATtiny20, ATtiny40</td>
642 </tr>
643
644 <tr>
645 <td>power_spi_enable()</td>
646 <td>Enable the Serial Peripheral Interface module.</td>
647 <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, ATmega256RFR2, ATmega128RFR2, ATmega64RFR2, ATmega256RFA2, ATmega128RFA2, ATmega64RFA2, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, AT90PWM161, ATmega165, ATmega165A, ATmega165P, ATmega165PA, ATmega325, ATmega325A, ATmega325PA, ATmega3250, ATmega3250A, ATmega3250PA, ATmega645, ATmega645A, ATmega645P, ATmega6450, ATmega6450A, ATmega6450P, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega48, ATmega48A, ATmega48PA, ATmega48P, ATmega88, ATmega88A, ATmega88P, ATmega88PA, ATmega168, ATmega168A, ATmega168P, ATmega168PA, ATmega328, ATmega328P, ATtiny48, ATtiny88, ATtiny828, ATtiny841, ATmega1284, ATmega1284P, ATmega32HVB, ATmega32HVBREVB, ATmega16HVB, ATmega16HVBREVB, ATmega26HVG, ATmega48HVF, ATA5790, ATA5790N, ATA5795, ATA5831, ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2, AT90SCR100, ATtiny20, ATtiny40</td>
648 </tr>
649
650 <tr>
651 <td>power_spic_disable()</td>
652 <td> Disable the SPI module on PortC </td>
653 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
654 </tr>
655
656 <tr>
657 <td>power_spic_disalbe()</td>
658 <td> Disable SPI module on PortC </td>
659 <td>ATxmega32E5</td>
660 </tr>
661
662 <tr>
663 <td>power_spic_enable()</td>
664 <td> Enable the SPI module on PortC </td>
665 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega32E5, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
666 </tr>
667
668 <tr>
669 <td>power_spid_disable()</td>
670 <td> Disable the SPI module on PortD </td>
671 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
672 </tr>
673
674 <tr>
675 <td>power_spid_enable()</td>
676 <td> Enable the SPI module on PortD </td>
677 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
678 </tr>
679
680 <tr>
681 <td>power_spie_disable()</td>
682 <td> Disable the SPI module on PortE </td>
683 <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
684 </tr>
685
686 <tr>
687 <td>power_spie_enable()</td>
688 <td> Enable the SPI module on PortE </td>
689 <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
690 </tr>
691
692 <tr>
693 <td>power_spif_disable()</td>
694 <td> Disable the SPI module on PortF </td>
695 <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
696 </tr>
697
698 <tr>
699 <td>power_spif_enable()</td>
700 <td> Enable the SPI module on PortF </td>
701 <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
702 </tr>
703
704 <tr>
705 <td>power_tc0c_disable()</td>
706 <td> Disable the TC0 module on PortC </td>
707 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega32E5, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
708 </tr>
709
710 <tr>
711 <td>power_tc0c_enable()</td>
712 <td> Enable the TC0 module on PortC </td>
713 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega32E5, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
714 </tr>
715
716 <tr>
717 <td>power_tc0d_disable()</td>
718 <td> Disable the TC0 module on PortD </td>
719 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
720 </tr>
721
722 <tr>
723 <td>power_tc0d_enable()</td>
724 <td> Enable the TC0 module on PortD </td>
725 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
726 </tr>
727
728 <tr>
729 <td>power_tc0e_disable()</td>
730 <td> Disable the TC0 module on PortE </td>
731 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
732 </tr>
733
734 <tr>
735 <td>power_tc0e_enable()</td>
736 <td> Enable the TC0 module on PortE </td>
737 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
738 </tr>
739
740 <tr>
741 <td>power_tc0f_disable()</td>
742 <td> Disable the TC0 module on PortF </td>
743 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
744 </tr>
745
746 <tr>
747 <td>power_tc0f_enable()</td>
748 <td> Enable the TC0 module on PortF </td>
749 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
750 </tr>
751
752 <tr>
753 <td>power_tc1c_disable()</td>
754 <td> Disable the TC1 module on PortC </td>
755 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega32E5, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
756 </tr>
757
758 <tr>
759 <td>power_tc1c_enable()</td>
760 <td> Enable the TC1 module on PortC </td>
761 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega32E5, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
762 </tr>
763
764 <tr>
765 <td>power_tc1d_disable()</td>
766 <td> Disable the TC1 module on PortD </td>
767 <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega32E5, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
768 </tr>
769
770 <tr>
771 <td>power_tc1d_enable()</td>
772 <td> Enable the TC1 module on PortD </td>
773 <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega32E5, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
774 </tr>
775
776 <tr>
777 <td>power_tc1e_disable()</td>
778 <td> Disable the TC1 module on PortE </td>
779 <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
780 </tr>
781
782 <tr>
783 <td>power_tc1e_enable()</td>
784 <td> Enable the TC1 module on PortE </td>
785 <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
786 </tr>
787
788 <tr>
789 <td>power_tc1f_disable()</td>
790 <td> Disable the TC1 module on PortF </td>
791 <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
792 </tr>
793
794 <tr>
795 <td>power_tc1f_enable()</td>
796 <td> Enable the TC1 module on PortF </td>
797 <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
798 </tr>
799
800 <tr>
801 <td>power_timer0_disable()</td>
802 <td>Disable the Timer 0 module.</td>
803 <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, ATmega256RFR2, ATmega128RFR2, ATmega64RFR2, ATmega256RFA2, ATmega128RFA2, ATmega64RFA2, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega406, ATtiny841, ATtiny24, ATtiny24A, ATtiny44, ATtiny44A, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny261A, ATtiny461, ATtiny461A, ATtiny861, ATtiny861A, ATtiny43U, ATmega1284, ATmega1284P, ATmega32HVB, ATmega32HVBREVB, ATmega16HVB, ATmega16HVBREVB, ATmega26HVG, ATmega48HVF, ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272, ATtiny1634, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2, AT90SCR100, ATtiny4, ATtiny5, ATtiny9, ATtiny10, ATtiny13A, ATtiny20, ATtiny40</td>
804 </tr>
805
806 <tr>
807 <td>power_timer0_enable()</td>
808 <td>Enable the Timer 0 module.</td>
809 <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, ATmega256RFR2, ATmega128RFR2, ATmega64RFR2, ATmega256RFA2, ATmega128RFA2, ATmega64RFA2, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega406, ATtiny841, ATtiny24, ATtiny24A, ATtiny44, ATtiny44A, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny261A, ATtiny461, ATtiny461A, ATtiny861, ATtiny861A, ATtiny43U, ATmega1284, ATmega1284P, ATmega32HVB, ATmega32HVBREVB, ATmega16HVB, ATmega16HVBREVB, ATmega26HVG, ATmega48HVF, ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272, ATtiny1634, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2, AT90SCR100, ATtiny4, ATtiny5, ATtiny9, ATtiny10, ATtiny13A, ATtiny20, ATtiny40</td>
810 </tr>
811
812 <tr>
813 <td>power_timer1_disable()</td>
814 <td>Disable the Timer 1 module.</td>
815 <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, ATmega256RFR2, ATmega128RFR2, ATmega64RFR2, ATmega256RFA2, ATmega128RFA2, ATmega64RFA2, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, AT90PWM161, ATmega165, ATmega165A, ATmega165P, ATmega165PA, ATmega325, ATmega325A, ATmega325PA, ATmega3250, ATmega3250A, ATmega3250PA, ATmega645, ATmega645A, ATmega645P, ATmega6450, ATmega6450A, ATmega6450P, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega406, ATtiny841, ATtiny24, ATtiny24A, ATtiny44, ATtiny44A, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny261A, ATtiny461, ATtiny461A, ATtiny861, ATtiny861A, ATtiny43U, ATmega1284, ATmega1284P, ATmega32HVB, ATmega32HVBREVB, ATmega16HVB, ATmega16HVBREVB, ATmega26HVG, ATmega48HVF, ATA5790, ATA5790N, ATA5795, ATA5831, ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272, ATtiny1634, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2, AT90SCR100, ATtiny20, ATtiny40</td>
816 </tr>
817
818 <tr>
819 <td>power_timer1_enable()</td>
820 <td>Enable the Timer 1 module.</td>
821 <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, ATmega256RFR2, ATmega128RFR2, ATmega64RFR2, ATmega256RFA2, ATmega128RFA2, ATmega64RFA2, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, AT90PWM161, ATmega165, ATmega165A, ATmega165P, ATmega165PA, ATmega325, ATmega325A, ATmega325PA, ATmega3250, ATmega3250A, ATmega3250PA, ATmega645, ATmega645A, ATmega645P, ATmega6450, ATmega6450A, ATmega6450P, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega406, ATtiny841, ATtiny24, ATtiny24A, ATtiny44, ATtiny44A, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny261A, ATtiny461, ATtiny461A, ATtiny861, ATtiny861A, ATtiny43U, ATmega1284, ATmega1284P, ATmega32HVB, ATmega32HVBREVB, ATmega16HVB, ATmega16HVBREVB, ATmega26HVG, ATmega48HVF, ATA5790, ATA5790N, ATA5795, ATA5831, ATmega16M1, ATmega32C1, ATmega32M1, ATmega64C1, ATmega64M1, ATtiny167, ATtiny87, ATA5505, ATA5272, ATtiny1634, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2, AT90SCR100, ATtiny20, ATtiny40</td>
822 </tr>
823
824 <tr>
825 <td>power_timer2_disable()</td>
826 <td>Disable the Timer 2 module.</td>
827 <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, ATmega256RFR2, ATmega128RFR2, ATmega64RFR2, ATmega256RFA2, ATmega128RFA2, ATmega64RFA2, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATtiny841, ATmega1284, ATmega1284P, ATA5790, ATA5790N, ATA5795, ATA5831, AT90SCR100</td>
828 </tr>
829
830 <tr>
831 <td>power_timer2_enable()</td>
832 <td>Enable the Timer 2 module.</td>
833 <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, ATmega256RFR2, ATmega128RFR2, ATmega64RFR2, ATmega256RFA2, ATmega128RFA2, ATmega64RFA2, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATtiny841, ATmega1284, ATmega1284P, ATA5790, ATA5790N, ATA5795, ATA5831, AT90SCR100</td>
834 </tr>
835
836 <tr>
837 <td>power_timer3_disable()</td>
838 <td>Disable the Timer 3 module.</td>
839 <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, ATmega256RFR2, ATmega128RFR2, ATmega64RFR2, ATmega256RFA2, ATmega128RFA2, ATmega64RFA2, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, ATmega1284, ATmega1284P, ATA5790, ATA5790N, ATA5795, ATA5831</td>
840 </tr>
841
842 <tr>
843 <td>power_timer3_enable()</td>
844 <td>Enable the Timer 3 module.</td>
845 <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, ATmega256RFR2, ATmega128RFR2, ATmega64RFR2, ATmega256RFA2, ATmega128RFA2, ATmega64RFA2, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, ATmega1284, ATmega1284P, ATA5790, ATA5790N, ATA5795, ATA5831</td>
846 </tr>
847
848 <tr>
849 <td>power_timer4_disable()</td>
850 <td>Disable the Timer 4 module.</td>
851 <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, ATmega256RFR2, ATmega128RFR2, ATmega64RFR2, ATmega256RFA2, ATmega128RFA2, ATmega64RFA2, ATA5831</td>
852 </tr>
853
854 <tr>
855 <td>power_timer4_enable()</td>
856 <td>Enable the Timer 4 module.</td>
857 <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, ATmega256RFR2, ATmega128RFR2, ATmega64RFR2, ATmega256RFA2, ATmega128RFA2, ATmega64RFA2, ATA5831</td>
858 </tr>
859
860 <tr>
861 <td>power_timermodulator_disable()</td>
862 <td> Disable the TIMERMODULATOR module </td>
863 <td>ATA5790, ATA5790N, ATA5795</td>
864 </tr>
865
866 <tr>
867 <td>power_timermodulator_enable()</td>
868 <td> Enable the TIMERMODULATOR module </td>
869 <td>ATA5790, ATA5790N, ATA5795</td>
870 </tr>
871
872 <tr>
873 <td>power_transceiver_disable()</td>
874 <td> Disable transceiver module </td>
875 <td>ATmega256RFR2, ATmega128RFR2, ATmega64RFR2, ATmega256RFA2, ATmega128RFA2, ATmega64RFA2</td>
876 </tr>
877
878 <tr>
879 <td>power_transceiver_enable()</td>
880 <td> Enable transceiver module </td>
881 <td>ATmega256RFR2, ATmega128RFR2, ATmega64RFR2, ATmega256RFA2, ATmega128RFA2, ATmega64RFA2</td>
882 </tr>
883
884 <tr>
885 <td>power_transmit_dsp_control_disable()</td>
886 <td>Disable Transmit DSP control module</td>
887 <td>ATA5831</td>
888 </tr>
889
890 <tr>
891 <td>power_transmit_dsp_control_enable()</td>
892 <td>Enable Transmit DSP control module</td>
893 <td>ATA5831</td>
894 </tr>
895
896 <tr>
897 <td>power_twi_disable()</td>
898 <td>Disable the Two Wire Interface module.</td>
899 <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, ATmega256RFR2, ATmega128RFR2, ATmega64RFR2, ATmega256RFA2, ATmega128RFA2, ATmega64RFA2, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega406, ATtiny841, ATmega1284, ATmega1284P, ATmega32HVB, ATmega32HVBREVB, ATmega16HVB, ATmega16HVBREVB, ATmega26HVG, ATmega48HVF, ATtiny1634, AT90SCR100, ATtiny20, ATtiny40</td>
900 </tr>
901
902 <tr>
903 <td>power_twi_enable()</td>
904 <td>Enable the Two Wire Interface module.</td>
905 <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, ATmega256RFR2, ATmega128RFR2, ATmega64RFR2, ATmega256RFA2, ATmega128RFA2, ATmega64RFA2, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega406, ATtiny841, ATmega1284, ATmega1284P, ATmega32HVB, ATmega32HVBREVB, ATmega16HVB, ATmega16HVBREVB, ATmega26HVG, ATmega48HVF, ATtiny1634, AT90SCR100, ATtiny20, ATtiny40</td>
906 </tr>
907
908 <tr>
909 <td>power_twic_disable()</td>
910 <td>Disable the Two Wire Interface module on PortC </td>
911 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega32E5, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
912 </tr>
913
914 <tr>
915 <td>power_twic_enable()</td>
916 <td>Enable the Two Wire Interface module on PortC </td>
917 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega32E5, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
918 </tr>
919
920 <tr>
921 <td>power_twid_disable()</td>
922 <td>Disable the Two Wire Interface module on PortD </td>
923 <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
924 </tr>
925
926 <tr>
927 <td>power_twid_enable()</td>
928 <td>Enable the Two Wire Interface module on PortD </td>
929 <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
930 </tr>
931
932 <tr>
933 <td>power_twie_disable()</td>
934 <td>Disable the Two Wire Interface module on PortE </td>
935 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
936 </tr>
937
938 <tr>
939 <td>power_twie_enable()</td>
940 <td>Enable the Two Wire Interface module on PortE </td>
941 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
942 </tr>
943
944 <tr>
945 <td>power_twif_disable()</td>
946 <td>Disable the Two Wire Interface module on PortF </td>
947 <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
948 </tr>
949
950 <tr>
951 <td>power_twif_enable()</td>
952 <td>Disable the Two Wire Interface module on PortF </td>
953 <td>ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
954 </tr>
955
956 <tr>
957 <td>power_tx_modulator_disable()</td>
958 <td>Disable Tx modulator</td>
959 <td>ATA5831</td>
960 </tr>
961
962 <tr>
963 <td>power_tx_modulator_enable()</td>
964 <td>Enable Tx modulator</td>
965 <td>ATA5831</td>
966 </tr>
967
968 <tr>
969 <td>power_usart0_disable()</td>
970 <td>Disable the USART 0 module.</td>
971 <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, ATmega256RFR2, ATmega128RFR2, ATmega64RFR2, ATmega256RFA2, ATmega128RFA2, ATmega64RFA2, ATmega32U4, ATmega16U4, ATmega165, ATmega165A, ATmega165P, ATmega165PA, ATmega325, ATmega325A, ATmega325PA, ATmega3250, ATmega3250A, ATmega3250PA, ATmega645, ATmega645A, ATmega645P, ATmega6450, ATmega6450A, ATmega6450P, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega48, ATmega48A, ATmega48PA, ATmega48P, ATmega88, ATmega88A, ATmega88P, ATmega88PA, ATmega168, ATmega168A, ATmega168P, ATmega168PA, ATmega328, ATmega328P, ATtiny48, ATtiny88, ATtiny828, ATtiny841, ATmega1284, ATmega1284P, ATtiny1634, AT90SCR100</td>
972 </tr>
973
974 <tr>
975 <td>power_usart0_enable()</td>
976 <td>Enable the USART 0 module.</td>
977 <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, ATmega256RFR2, ATmega128RFR2, ATmega64RFR2, ATmega256RFA2, ATmega128RFA2, ATmega64RFA2, ATmega32U4, ATmega16U4, ATmega165, ATmega165A, ATmega165P, ATmega165PA, ATmega325, ATmega325A, ATmega325PA, ATmega3250, ATmega3250A, ATmega3250PA, ATmega645, ATmega645A, ATmega645P, ATmega6450, ATmega6450A, ATmega6450P, ATmega169, ATmega169A, ATmega169P, ATmega169PA, ATmega329, ATmega329A, ATmega329P, ATmega329PA, ATmega3290, ATmega3290A, ATmega3290P, ATmega3290PA, ATmega649, ATmega649A, ATmega649P, ATmega6490, ATmega6490A, ATmega6490P, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATmega644, ATmega164PA, ATmega48, ATmega48A, ATmega48PA, ATmega48P, ATmega88, ATmega88A, ATmega88P, ATmega88PA, ATmega168, ATmega168A, ATmega168P, ATmega168PA, ATmega328, ATmega328P, ATtiny48, ATtiny88, ATtiny828, ATtiny841, ATmega1284, ATmega1284P, ATtiny1634, AT90SCR100</td>
978 </tr>
979
980 <tr>
981 <td>power_usart1_disable()</td>
982 <td>Disable the USART 1 module.</td>
983 <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, ATmega256RFR2, ATmega128RFR2, ATmega64RFR2, ATmega256RFA2, ATmega128RFA2, ATmega64RFA2, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATtiny841, ATmega1284P, ATtiny1634, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2</td>
984 </tr>
985
986 <tr>
987 <td>power_usart1_enable()</td>
988 <td>Enable the USART 1 module.</td>
989 <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega128RFA1, ATmega256RFR2, ATmega128RFR2, ATmega64RFR2, ATmega256RFA2, ATmega128RFA2, ATmega64RFA2, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, ATmega164A, ATmega164P, ATmega324A, ATmega324P, ATmega324PA, ATmega644P, ATmega644A, ATmega644PA, ATtiny841, ATmega1284P, ATtiny1634, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2</td>
990 </tr>
991
992 <tr>
993 <td>power_usart2_disable()</td>
994 <td>Disable the USART 2 module.</td>
995 <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561</td>
996 </tr>
997
998 <tr>
999 <td>power_usart2_enable()</td>
1000 <td>Enable the USART 2 module.</td>
1001 <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561</td>
1002 </tr>
1003
1004 <tr>
1005 <td>power_usart3_disable()</td>
1006 <td>Disable the USART 3 module.</td>
1007 <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561</td>
1008 </tr>
1009
1010 <tr>
1011 <td>power_usart3_enable()</td>
1012 <td>Enable the USART 3 module.</td>
1013 <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561</td>
1014 </tr>
1015
1016 <tr>
1017 <td>power_usart_disable()</td>
1018 <td>Disable the USART module.</td>
1019 <td>AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316</td>
1020 </tr>
1021
1022 <tr>
1023 <td>power_usart_enable()</td>
1024 <td>Enable the USART module.</td>
1025 <td>AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316</td>
1026 </tr>
1027
1028 <tr>
1029 <td>power_usartc0_disable()</td>
1030 <td> Disable the USART0 module on PortC </td>
1031 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega32E5, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
1032 </tr>
1033
1034 <tr>
1035 <td>power_usartc0_enable()</td>
1036 <td> Enable the USART0 module on PortC </td>
1037 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega32E5, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
1038 </tr>
1039
1040 <tr>
1041 <td>power_usartc1_disable()</td>
1042 <td> Disable the USART1 module on PortC </td>
1043 <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
1044 </tr>
1045
1046 <tr>
1047 <td>power_usartc1_enable()</td>
1048 <td> Enable the USART1 module on PortC </td>
1049 <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
1050 </tr>
1051
1052 <tr>
1053 <td>power_usartd0_disable()</td>
1054 <td> Disable the USART0 module on PortD </td>
1055 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega32E5, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
1056 </tr>
1057
1058 <tr>
1059 <td>power_usartd0_enable()</td>
1060 <td> Enable the USART0 module on PortD </td>
1061 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega32E5, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
1062 </tr>
1063
1064 <tr>
1065 <td>power_usartd1_disable()</td>
1066 <td> Disable the USART1 module on PortD </td>
1067 <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
1068 </tr>
1069
1070 <tr>
1071 <td>power_usartd1_enable()</td>
1072 <td> Enable the USART1 module on PortE </td>
1073 <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
1074 </tr>
1075
1076 <tr>
1077 <td>power_usarte0_disable()</td>
1078 <td> Disable the USART0 module on PortE </td>
1079 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
1080 </tr>
1081
1082 <tr>
1083 <td>power_usarte0_enable()</td>
1084 <td> Enable the USART0 module on PortE </td>
1085 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
1086 </tr>
1087
1088 <tr>
1089 <td>power_usarte1_disable()</td>
1090 <td> Disable the USART1 module on PortE </td>
1091 <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
1092 </tr>
1093
1094 <tr>
1095 <td>power_usarte1_enable()</td>
1096 <td> Enable the USART1 module on PortE </td>
1097 <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
1098 </tr>
1099
1100 <tr>
1101 <td>power_usartf0_disable()</td>
1102 <td> Disable the USART0 module on PortF </td>
1103 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
1104 </tr>
1105
1106 <tr>
1107 <td>power_usartf0_enable()</td>
1108 <td> Enable the USART0 module on PortF </td>
1109 <td>ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega16A4, ATxmega16A4U, ATxmega16D4, ATxmega32A4, ATxmega32A4U, ATxmega32D4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega64D3, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega128D3, ATxmega192A3, ATxmega192A3U, ATxmega192D3, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATxmega64D4, ATxmega128D4, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
1110 </tr>
1111
1112 <tr>
1113 <td>power_usartf1_disable()</td>
1114 <td> Disable the USART1 module on PortF </td>
1115 <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
1116 </tr>
1117
1118 <tr>
1119 <td>power_usartf1_enable()</td>
1120 <td> Enable the USART1 module on PortF </td>
1121 <td>ATxmega16A4, ATxmega16A4U, ATxmega32A4U, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmega64A3U, ATxmega64A4U, ATxmega128A1, ATxmega128A1U, ATxmega128A3, ATxmega128A3U, ATxmega128A4U, ATxmega192A3, ATxmega192A3U, ATxmega256A3, ATxmega256A3U, ATxmega256A3B, ATxmega256A3BU, ATxmega384C3, ATMXT112SL, ATMXT224, ATMXT224E, ATMXT336S, ATMXT540S, ATMXT540SREVA</td>
1122 </tr>
1123
1124 <tr>
1125 <td>power_usb_disable()</td>
1126 <td>Disable the USB module.</td>
1127 <td>ATxmega384C3, ATxmega256A3BU, ATxmega16A4U, ATxmega32A4U, ATxmega64A3U, ATxmega64A4U, ATxmega128A3U, ATxmega128A4U, ATxmega192A3U, ATxmega256A3U, ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2, AT90SCR100</td>
1128 </tr>
1129
1130 <tr>
1131 <td>power_usb_enable()</td>
1132 <td>Enable the USB module.</td>
1133 <td>ATxmega384C3, ATxmega256A3BU, ATxmega16A4U, ATxmega32A4U, ATxmega64A3U, ATxmega64A4U, ATxmega128A3U, ATxmega128A4U, ATxmega192A3U, ATxmega256A3U, ATxmega16C4, ATxmega32C4, ATxmega64C3, ATxmega128C3, ATxmega192C3, ATxmega256C3, ATxmega64B1, ATxmega64B3, ATxmega128B1, ATxmega128B3, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega32U4, ATmega16U4, ATmega32U6, AT90USB82, AT90USB162, ATmega8U2, ATmega16U2, ATmega32U2, AT90SCR100</td>
1134 </tr>
1135
1136 <tr>
1137 <td>power_usbh_disable()</td>
1138 <td> Disable the USBH module </td>
1139 <td>AT90SCR100</td>
1140 </tr>
1141
1142 <tr>
1143 <td>power_usbh_enable()</td>
1144 <td> Enable the USBH module </td>
1145 <td>AT90SCR100</td>
1146 </tr>
1147
1148 <tr>
1149 <td>power_usi_disable()</td>
1150 <td>Disable the Universal Serial Interface module.</td>
1151 <td>ATtiny24, ATtiny24A, ATtiny44, ATtiny44A, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny261A, ATtiny461, ATtiny461A, ATtiny861, ATtiny861A, ATtiny43U, ATtiny167, ATtiny87, ATA5505, ATA5272, ATtiny1634</td>
1152 </tr>
1153
1154 <tr>
1155 <td>power_usi_enable()</td>
1156 <td>Enable the Universal Serial Interface module.</td>
1157 <td>ATtiny24, ATtiny24A, ATtiny44, ATtiny44A, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny261A, ATtiny461, ATtiny461A, ATtiny861, ATtiny861A, ATtiny43U, ATtiny167, ATtiny87, ATA5505, ATA5272, ATtiny1634</td>
1158 </tr>
1159
1160 <tr>
1161 <td>power_vadc_disable()</td>
1162 <td>Disable the Voltage ADC module.</td>
1163 <td>ATmega406, ATmega32HVB, ATmega32HVBREVB, ATmega16HVB, ATmega16HVBREVB, ATmega26HVG, ATmega48HVF</td>
1164 </tr>
1165
1166 <tr>
1167 <td>power_vadc_enable()</td>
1168 <td>Enable the Voltage ADC module.</td>
1169 <td>ATmega406, ATmega32HVB, ATmega32HVBREVB, ATmega16HVB, ATmega16HVBREVB, ATmega26HVG, ATmega48HVF</td>
1170 </tr>
1171
1172 <tr>
1173 <td>power_vmonitor_disable()</td>
1174 <td> Disable the VMONITOR module </td>
1175 <td>ATA5790, ATA5790N, ATA5795</td>
1176 </tr>
1177
1178 <tr>
1179 <td>power_vmonitor_enable()</td>
1180 <td> Enable the VMONITOR module </td>
1181 <td>ATA5790, ATA5790N, ATA5795</td>
1182 </tr>
1183
1184 <tr>
1185 <td>power_voltage_monitor_disable()</td>
1186 <td>Disable voltage monitor module</td>
1187 <td>ATA5831</td>
1188 </tr>
1189
1190 <tr>
1191 <td>power_voltage_monitor_enable()</td>
1192 <td>Enable voltage monitor module</td>
1193 <td>ATA5831</td>
1194 </tr>
1195
1196 <tr>
1197 <td>power_vrm_disable()</td>
1198 <td> Disable the VRM module </td>
1199 <td>ATmega32HVB, ATmega32HVBREVB, ATmega16HVB, ATmega16HVBREVB, ATmega26HVG, ATmega48HVF</td>
1200 </tr>
1201
1202 <tr>
1203 <td>power_vrm_enable()</td>
1204 <td> Enable the VRM module </td>
1205 <td>ATmega32HVB, ATmega32HVBREVB, ATmega16HVB, ATmega16HVBREVB, ATmega26HVG, ATmega48HVF</td>
1206 </tr>
1207 </table>
1208 </center>
1209 </small>
1210
1211 @} */
1212
1213 // Xmega A series has AES, EBI and DMA bits
1214 // Include any other device on need basis
1215 #if defined(__AVR_ATxmega16A4__) \
1216 || defined(__AVR_ATxmega16A4U__) \
1217 || defined(__AVR_ATxmega32A4U__) \
1218 || defined(__AVR_ATxmega32A4__) \
1219 || defined(__AVR_ATxmega64A1__) \
1220 || defined(__AVR_ATxmega64A1U__) \
1221 || defined(__AVR_ATxmega64A3__) \
1222 || defined(__AVR_ATxmega64A3U__) \
1223 || defined(__AVR_ATxmega64A4U__) \
1224 || defined(__AVR_ATxmega128A1__) \
1225 || defined(__AVR_ATxmega128A1U__) \
1226 || defined(__AVR_ATxmega128A3__) \
1227 || defined(__AVR_ATxmega128A3U__) \
1228 || defined(__AVR_ATxmega128A4U__) \
1229 || defined(__AVR_ATxmega192A3__) \
1230 || defined(__AVR_ATxmega192A3U__) \
1231 || defined(__AVR_ATxmega256A3__) \
1232 || defined(__AVR_ATxmega256A3U__) \
1233 || defined(__AVR_ATxmega256A3B__) \
1234 || defined(__AVR_ATxmega256A3BU__) \
1235 || defined(__AVR_ATxmega384C3__)
1236
1237
1238 #define power_aes_enable() (PR_PRGEN &= (uint8_t)~(PR_AES_bm))
1239 #define power_aes_disable() (PR_PRGEN |= (uint8_t)PR_AES_bm)
1240
1241 #define power_ebi_enable() (PR_PRGEN &= (uint8_t)~(PR_EBI_bm))
1242 #define power_ebi_disable() (PR_PRGEN |= (uint8_t)PR_EBI_bm)
1243
1244 #define power_dma_enable() (PR_PRGEN &= (uint8_t)~(PR_DMA_bm))
1245 #define power_dma_disable() (PR_PRGEN |= (uint8_t)PR_DMA_bm)
1246
1247 #define power_daca_enable() (PR_PRPA &= (uint8_t)~(PR_DAC_bm))
1248 #define power_daca_disable() (PR_PRPA |= (uint8_t)PR_DAC_bm)
1249 #define power_dacb_enable() (PR_PRPB &= (uint8_t)~(PR_DAC_bm))
1250 #define power_dacb_disable() (PR_PRPB |= (uint8_t)PR_DAC_bm)
1251
1252 #define power_usartc1_enable() (PR_PRPC &= (uint8_t)~(PR_USART1_bm))
1253 #define power_usartc1_disable() (PR_PRPC |= (uint8_t)PR_USART1_bm)
1254 #define power_usartd1_enable() (PR_PRPD &= (uint8_t)~(PR_USART1_bm))
1255 #define power_usartd1_disable() (PR_PRPD |= (uint8_t)PR_USART1_bm)
1256 #define power_usarte1_enable() (PR_PRPE &= (uint8_t)~(PR_USART1_bm))
1257 #define power_usarte1_disable() (PR_PRPE |= (uint8_t)PR_USART1_bm)
1258 #define power_usartf1_enable() (PR_PRPF &= (uint8_t)~(PR_USART1_bm))
1259 #define power_usartf1_disable() (PR_PRPF |= (uint8_t)PR_USART1_bm)
1260
1261 #if defined(__AVR_ATxmega384C3__) \
1262 || defined(__AVR_ATxmega256A3BU__) \
1263 || defined(__AVR_ATxmega16A4U__) \
1264 || defined(__AVR_ATxmega32A4U__) \
1265 || defined(__AVR_ATxmega64A3U__) \
1266 || defined(__AVR_ATxmega64A4U__) \
1267 || defined(__AVR_ATxmega128A3U__) \
1268 || defined(__AVR_ATxmega128A4U__) \
1269 || defined(__AVR_ATxmega192A3U__) \
1270 || defined(__AVR_ATxmega256A3U__)
1271
1272 #define power_usb_enable() (PR_PRGEN &= (uint8_t)~(PR_USB_bm))
1273 #define power_usb_disable() (PR_PRGEN &= (uint8_t)(PR_USB_bm))
1274
1275 #define power_all_enable() \
1276 do { \
1277 PR_PRGEN &= (uint8_t)~(PR_AES_bm|PR_EBI_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm|PR_USB_bm); \
1278 PR_PRPA &= (uint8_t)~(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
1279 PR_PRPB &= (uint8_t)~(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
1280 PR_PRPC &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1281 PR_PRPD &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1282 PR_PRPE &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1283 PR_PRPF &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1284 } while(0)
1285
1286 #define power_all_disable() \
1287 do { \
1288 PR_PRGEN |= (uint8_t)(PR_AES_bm|PR_EBI_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm|PR_USB_bm); \
1289 PR_PRPA |= (uint8_t)(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
1290 PR_PRPB |= (uint8_t)(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
1291 PR_PRPC |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1292 PR_PRPD |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1293 PR_PRPE |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1294 PR_PRPF |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1295 } while(0)
1296
1297 #else
1298
1299 #define power_all_enable() \
1300 do { \
1301 PR_PRGEN &= (uint8_t)~(PR_AES_bm|PR_EBI_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm); \
1302 PR_PRPA &= (uint8_t)~(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
1303 PR_PRPB &= (uint8_t)~(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
1304 PR_PRPC &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1305 PR_PRPD &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1306 PR_PRPE &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1307 PR_PRPF &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1308 } while(0)
1309
1310
1311 #define power_all_disable() \
1312 do { \
1313 PR_PRGEN|= (uint8_t)(PR_AES_bm|PR_EBI_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm); \
1314 PR_PRPA |= (uint8_t)(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
1315 PR_PRPB |= (uint8_t)(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
1316 PR_PRPC |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1317 PR_PRPD |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1318 PR_PRPE |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1319 PR_PRPF |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1320 } while(0)
1321 #endif
1322
1323 #endif
1324
1325 #if defined(__AVR_ATxmega16C4__) \
1326 || defined(__AVR_ATxmega32C4__) \
1327 || defined(__AVR_ATxmega64C3__) \
1328 || defined(__AVR_ATxmega128C3__) \
1329 || defined(__AVR_ATxmega192C3__) \
1330 || defined(__AVR_ATxmega256C3__)
1331
1332 #define power_usb_enable() (PR_PRGEN &= (uint8_t)~(PR_USB_bm))
1333 #define power_usb_disable() (PR_PRGEN &= (uint8_t)(PR_USB_bm))
1334
1335 #define power_aes_enable() (PR_PRGEN &= (uint8_t)~(PR_AES_bm))
1336 #define power_aes_disable() (PR_PRGEN |= (uint8_t)PR_AES_bm)
1337
1338 #define power_rtc_enable() (PR_PRGEN &= (uint8_t)~(PR_RTC_bm))
1339 #define power_rtc_disable() (PR_PRGEN |= (uint8_t)PR_RTC_bm)
1340
1341 #define power_evsys_enable() (PR_PRGEN &= (uint8_t)~(PR_EVSYS_bm))
1342 #define power_evsys_disable() (PR_PRGEN |= (uint8_t)PR_EVSYS_bm)
1343
1344 #define power_dma_enable() (PR_PRGEN &= (uint8_t)~(PR_DMA_bm))
1345 #define power_dma_disable() (PR_PRGEN |= (uint8_t)PR_DMA_bm)
1346
1347 #define power_adca_enable() (PR_PRPA &= (uint8_t)~(PR_ADC_bm))
1348 #define power_adca_disable() (PR_PRPA |= (uint8_t)PR_ADC_bm)
1349
1350 #define power_aca_enable() (PR_PRPA &= (uint8_t)~(PR_AC_bm))
1351 #define power_aca_disable() (PR_PRPA |= (uint8_t)PR_AC_bm)
1352
1353 #define power_twic_enable() (PR_PRPC &= (uint8_t)~(PR_TWI_bm))
1354 #define power_twic_disable() (PR_PRPC |= (uint8_t)PR_TWI_bm)
1355 #define power_twie_enable() (PR_PRPE &= (uint8_t)~(PR_TWI_bm))
1356 #define power_twie_disable() (PR_PRPE |= (uint8_t)PR_TWI_bm)
1357
1358 #define power_usartc1_enable() (PR_PRPC &= (uint8_t)~(PR_USART1_bm))
1359 #define power_usartc1_disable() (PR_PRPC |= (uint8_t)PR_USART1_bm)
1360
1361 #define power_usartc0_enable() (PR_PRPC &= (uint8_t)~(PR_USART0_bm))
1362 #define power_usartc0_disable() (PR_PRPC |= (uint8_t)PR_USART0_bm)
1363 #define power_usartd0_enable() (PR_PRPD &= (uint8_t)~(PR_USART0_bm))
1364 #define power_usartd0_disable() (PR_PRPD |= (uint8_t)PR_USART0_bm)
1365 #define power_usarte0_enable() (PR_PRPE &= (uint8_t)~(PR_USART0_bm))
1366 #define power_usarte0_disable() (PR_PRPE |= (uint8_t)PR_USART0_bm)
1367 #define power_usartf0_enable() (PR_PRPF &= (uint8_t)~(PR_USART0_bm))
1368 #define power_usartf0_disable() (PR_PRPF |= (uint8_t)PR_USART0_bm)
1369
1370 #define power_spic_enable() (PR_PRPC &= (uint8_t)~(PR_SPI_bm))
1371 #define power_spic_disable() (PR_PRPC |= (uint8_t)PR_SPI_bm)
1372 #define power_spid_enable() (PR_PRPD &= (uint8_t)~(PR_SPI_bm))
1373 #define power_spid_disable() (PR_PRPD |= (uint8_t)PR_SPI_bm)
1374
1375 #define power_hiresc_enable() (PR_PRPC &= (uint8_t)~(PR_HIRES_bm))
1376 #define power_hiresc_disable() (PR_PRPC |= (uint8_t)PR_HIRES_bm)
1377
1378 #define power_tc1c_enable() (PR_PRPC &= (uint8_t)~(PR_TC1_bm))
1379 #define power_tc1c_disable() (PR_PRPC |= (uint8_t)PR_TC1_bm)
1380
1381 #define power_tc0c_enable() (PR_PRPC &= (uint8_t)~(PR_TC0_bm))
1382 #define power_tc0c_disable() (PR_PRPC |= (uint8_t)PR_TC0_bm)
1383 #define power_tc0d_enable() (PR_PRPD &= (uint8_t)~(PR_TC0_bm))
1384 #define power_tc0d_disable() (PR_PRPD |= (uint8_t)PR_TC0_bm)
1385 #define power_tc0e_enable() (PR_PRPE &= (uint8_t)~(PR_TC0_bm))
1386 #define power_tc0e_disable() (PR_PRPE |= (uint8_t)PR_TC0_bm)
1387 #define power_tc0f_enable() (PR_PRPF &= (uint8_t)~(PR_TC0_bm))
1388 #define power_tc0f_disable() (PR_PRPF |= (uint8_t)PR_TC0_bm)
1389
1390 #define power_all_enable() \
1391 do { \
1392 PR_PRGEN &= (uint8_t)~(PR_USB_bm|PR_AES_bm|PR_DMA_bm|PR_RTC_bm|PR_EVSYS_bm); \
1393 PR_PRPA &= (uint8_t)~(PR_ADC_bm|PR_AC_bm); \
1394 PR_PRPC &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_USART1_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1395 PR_PRPD &= (uint8_t)~(PR_USART0_bm|PR_SPI_bm|PR_TC0_bm); \
1396 PR_PRPE &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_TC0_bm); \
1397 PR_PRPF &= (uint8_t)~(PR_USART0_bm|PR_TC0_bm); \
1398 } while(0)
1399
1400 #define power_all_disable() \
1401 do { \
1402 PR_PRGEN |= (uint8_t)(PR_USB_bm|PR_AES_bm|PR_DMA_bm|PR_RTC_bm|PR_EVSYS_bm); \
1403 PR_PRPA |= (uint8_t)(PR_ADC_bm|PR_AC_bm); \
1404 PR_PRPC |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_USART1_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1405 PR_PRPD |= (uint8_t)(PR_USART0_bm|PR_SPI_bm|PR_TC0_bm); \
1406 PR_PRPE |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_TC0_bm); \
1407 PR_PRPF |= (uint8_t)(PR_USART0_bm|PR_TC0_bm); \
1408 } while(0)
1409
1410 #endif
1411
1412 #if defined(__AVR_ATxmega16A4__) \
1413 || defined(__AVR_ATxmega16A4U__) \
1414 || defined(__AVR_ATxmega16D4__) \
1415 || defined(__AVR_ATxmega32A4__) \
1416 || defined(__AVR_ATxmega32A4U__) \
1417 || defined(__AVR_ATxmega32D4__) \
1418 || defined(__AVR_ATxmega64A1__) \
1419 || defined(__AVR_ATxmega64A1U__) \
1420 || defined(__AVR_ATxmega64A3__) \
1421 || defined(__AVR_ATxmega64A3U__) \
1422 || defined(__AVR_ATxmega64A4U__) \
1423 || defined(__AVR_ATxmega64D3__) \
1424 || defined(__AVR_ATxmega128A1__) \
1425 || defined(__AVR_ATxmega128A1U__) \
1426 || defined(__AVR_ATxmega128A3__) \
1427 || defined(__AVR_ATxmega128A3U__) \
1428 || defined(__AVR_ATxmega128A4U__) \
1429 || defined(__AVR_ATxmega128D3__) \
1430 || defined(__AVR_ATxmega192A3__) \
1431 || defined(__AVR_ATxmega192A3U__) \
1432 || defined(__AVR_ATxmega192D3__) \
1433 || defined(__AVR_ATxmega256A3__) \
1434 || defined(__AVR_ATxmega256A3U__) \
1435 || defined(__AVR_ATxmega256A3B__) \
1436 || defined(__AVR_ATxmega256A3BU__) \
1437 || defined(__AVR_ATxmega384C3__)
1438
1439
1440 #define power_rtc_enable() (PR_PRGEN &= (uint8_t)~(PR_RTC_bm))
1441 #define power_rtc_disable() (PR_PRGEN |= (uint8_t)PR_RTC_bm)
1442
1443 #define power_evsys_enable() (PR_PRGEN &= (uint8_t)~(PR_EVSYS_bm))
1444 #define power_evsys_disable() (PR_PRGEN |= (uint8_t)PR_EVSYS_bm)
1445
1446 #define power_adca_enable() (PR_PRPA &= (uint8_t)~(PR_ADC_bm))
1447 #define power_adca_disable() (PR_PRPA |= (uint8_t)PR_ADC_bm)
1448 #define power_adcb_enable() (PR_PRPB &= (uint8_t)~(PR_ADC_bm))
1449 #define power_adcb_disable() (PR_PRPB |= (uint8_t)PR_ADC_bm)
1450
1451 #define power_aca_enable() (PR_PRPA &= (uint8_t)~(PR_AC_bm))
1452 #define power_aca_disable() (PR_PRPA |= (uint8_t)PR_AC_bm)
1453 #define power_acb_enable() (PR_PRPB &= (uint8_t)~(PR_AC_bm))
1454 #define power_acb_disable() (PR_PRPB |= (uint8_t)PR_AC_bm)
1455
1456 #define power_twic_enable() (PR_PRPC &= (uint8_t)~(PR_TWI_bm))
1457 #define power_twic_disable() (PR_PRPC |= (uint8_t)PR_TWI_bm)
1458 #define power_twid_enable() (PR_PRPD &= (uint8_t)~(PR_TWI_bm))
1459 #define power_twid_disable() (PR_PRPD |= (uint8_t)PR_TWI_bm)
1460 #define power_twie_enable() (PR_PRPE &= (uint8_t)~(PR_TWI_bm))
1461 #define power_twie_disable() (PR_PRPE |= (uint8_t)PR_TWI_bm)
1462 #define power_twif_enable() (PR_PRPF &= (uint8_t)~(PR_TWI_bm))
1463 #define power_twif_disable() (PR_PRPF |= (uint8_t)PR_TWI_bm)
1464
1465 #define power_usartc0_enable() (PR_PRPC &= (uint8_t)~(PR_USART0_bm))
1466 #define power_usartc0_disable() (PR_PRPC |= (uint8_t)PR_USART0_bm)
1467 #define power_usartd0_enable() (PR_PRPD &= (uint8_t)~(PR_USART0_bm))
1468 #define power_usartd0_disable() (PR_PRPD |= (uint8_t)PR_USART0_bm)
1469 #define power_usarte0_enable() (PR_PRPE &= (uint8_t)~(PR_USART0_bm))
1470 #define power_usarte0_disable() (PR_PRPE |= (uint8_t)PR_USART0_bm)
1471 #define power_usartf0_enable() (PR_PRPF &= (uint8_t)~(PR_USART0_bm))
1472 #define power_usartf0_disable() (PR_PRPF |= (uint8_t)PR_USART0_bm)
1473
1474 #define power_spic_enable() (PR_PRPC &= (uint8_t)~(PR_SPI_bm))
1475 #define power_spic_disable() (PR_PRPC |= (uint8_t)PR_SPI_bm)
1476 #define power_spid_enable() (PR_PRPD &= (uint8_t)~(PR_SPI_bm))
1477 #define power_spid_disable() (PR_PRPD |= (uint8_t)PR_SPI_bm)
1478 #define power_spie_enable() (PR_PRPE &= (uint8_t)~(PR_SPI_bm))
1479 #define power_spie_disable() (PR_PRPE |= (uint8_t)PR_SPI_bm)
1480 #define power_spif_enable() (PR_PRPF &= (uint8_t)~(PR_SPI_bm))
1481 #define power_spif_disable() (PR_PRPF |= (uint8_t)PR_SPI_bm)
1482
1483 #define power_hiresc_enable() (PR_PRPC &= (uint8_t)~(PR_HIRES_bm))
1484 #define power_hiresc_disable() (PR_PRPC |= (uint8_t)PR_HIRES_bm)
1485 #define power_hiresd_enable() (PR_PRPD &= (uint8_t)~(PR_HIRES_bm))
1486 #define power_hiresd_disable() (PR_PRPD |= (uint8_t)PR_HIRES_bm)
1487 #define power_hirese_enable() (PR_PRPE &= (uint8_t)~(PR_HIRES_bm))
1488 #define power_hirese_disable() (PR_PRPE |= (uint8_t)PR_HIRES_bm)
1489 #define power_hiresf_enable() (PR_PRPF &= (uint8_t)~(PR_HIRES_bm))
1490 #define power_hiresf_disable() (PR_PRPF |= (uint8_t)PR_HIRES_bm)
1491
1492 #define power_tc1c_enable() (PR_PRPC &= (uint8_t)~(PR_TC1_bm))
1493 #define power_tc1c_disable() (PR_PRPC |= (uint8_t)PR_TC1_bm)
1494 #define power_tc1d_enable() (PR_PRPD &= (uint8_t)~(PR_TC1_bm))
1495 #define power_tc1d_disable() (PR_PRPD |= (uint8_t)PR_TC1_bm)
1496 #define power_tc1e_enable() (PR_PRPE &= (uint8_t)~(PR_TC1_bm))
1497 #define power_tc1e_disable() (PR_PRPE |= (uint8_t)PR_TC1_bm)
1498 #define power_tc1f_enable() (PR_PRPF &= (uint8_t)~(PR_TC1_bm))
1499 #define power_tc1f_disable() (PR_PRPF |= (uint8_t)PR_TC1_bm)
1500
1501 #define power_tc0c_enable() (PR_PRPC &= (uint8_t)~(PR_TC0_bm))
1502 #define power_tc0c_disable() (PR_PRPC |= (uint8_t)PR_TC0_bm)
1503 #define power_tc0d_enable() (PR_PRPD &= (uint8_t)~(PR_TC0_bm))
1504 #define power_tc0d_disable() (PR_PRPD |= (uint8_t)PR_TC0_bm)
1505 #define power_tc0e_enable() (PR_PRPE &= (uint8_t)~(PR_TC0_bm))
1506 #define power_tc0e_disable() (PR_PRPE |= (uint8_t)PR_TC0_bm)
1507 #define power_tc0f_enable() (PR_PRPF &= (uint8_t)~(PR_TC0_bm))
1508 #define power_tc0f_disable() (PR_PRPF |= (uint8_t)PR_TC0_bm)
1509
1510 #endif
1511
1512 #if defined(__AVR_ATxmega64D4__) \
1513 || defined(__AVR_ATxmega128D4__)
1514
1515 #define power_rtc_enable() (PR_PRGEN &= (uint8_t)~(PR_RTC_bm))
1516 #define power_rtc_disable() (PR_PRGEN |= (uint8_t)PR_RTC_bm)
1517
1518 #define power_evsys_enable() (PR_PRGEN &= (uint8_t)~(PR_EVSYS_bm))
1519 #define power_evsys_disable() (PR_PRGEN |= (uint8_t)PR_EVSYS_bm)
1520
1521 #define power_adca_enable() (PR_PRPA &= (uint8_t)~(PR_ADC_bm))
1522 #define power_adca_disable() (PR_PRPA |= (uint8_t)PR_ADC_bm)
1523
1524 #define power_aca_enable() (PR_PRPA &= (uint8_t)~(PR_AC_bm))
1525 #define power_aca_disable() (PR_PRPA |= (uint8_t)PR_AC_bm)
1526
1527 #define power_twic_enable() (PR_PRPC &= (uint8_t)~(PR_TWI_bm))
1528 #define power_twic_disable() (PR_PRPC |= (uint8_t)PR_TWI_bm)
1529 #define power_twie_enable() (PR_PRPE &= (uint8_t)~(PR_TWI_bm))
1530 #define power_twie_disable() (PR_PRPE |= (uint8_t)PR_TWI_bm)
1531
1532 #define power_usartc0_enable() (PR_PRPC &= (uint8_t)~(PR_USART0_bm))
1533 #define power_usartc0_disable() (PR_PRPC |= (uint8_t)PR_USART0_bm)
1534 #define power_usartd0_enable() (PR_PRPD &= (uint8_t)~(PR_USART0_bm))
1535 #define power_usartd0_disable() (PR_PRPD |= (uint8_t)PR_USART0_bm)
1536 #define power_usarte0_enable() (PR_PRPE &= (uint8_t)~(PR_USART0_bm))
1537 #define power_usarte0_disable() (PR_PRPE |= (uint8_t)PR_USART0_bm)
1538 #define power_usartf0_enable() (PR_PRPF &= (uint8_t)~(PR_USART0_bm))
1539 #define power_usartf0_disable() (PR_PRPF |= (uint8_t)PR_USART0_bm)
1540
1541 #define power_spic_enable() (PR_PRPC &= (uint8_t)~(PR_SPI_bm))
1542 #define power_spic_disable() (PR_PRPC |= (uint8_t)PR_SPI_bm)
1543 #define power_spid_enable() (PR_PRPD &= (uint8_t)~(PR_SPI_bm))
1544 #define power_spid_disable() (PR_PRPD |= (uint8_t)PR_SPI_bm)
1545
1546 #define power_hiresc_enable() (PR_PRPC &= (uint8_t)~(PR_HIRES_bm))
1547 #define power_hiresc_disable() (PR_PRPC |= (uint8_t)PR_HIRES_bm)
1548
1549 #define power_tc1c_enable() (PR_PRPC &= (uint8_t)~(PR_TC1_bm))
1550 #define power_tc1c_disable() (PR_PRPC |= (uint8_t)PR_TC1_bm)
1551
1552 #define power_tc0c_enable() (PR_PRPC &= (uint8_t)~(PR_TC0_bm))
1553 #define power_tc0c_disable() (PR_PRPC |= (uint8_t)PR_TC0_bm)
1554 #define power_tc0d_enable() (PR_PRPD &= (uint8_t)~(PR_TC0_bm))
1555 #define power_tc0d_disable() (PR_PRPD |= (uint8_t)PR_TC0_bm)
1556 #define power_tc0e_enable() (PR_PRPE &= (uint8_t)~(PR_TC0_bm))
1557 #define power_tc0e_disable() (PR_PRPE |= (uint8_t)PR_TC0_bm)
1558 #define power_tc0f_enable() (PR_PRPF &= (uint8_t)~(PR_TC0_bm))
1559 #define power_tc0f_disable() (PR_PRPF |= (uint8_t)PR_TC0_bm)
1560
1561 #define power_all_enable() \
1562 do { \
1563 PR_PRGEN &= (uint8_t)~(PR_RTC_bm|PR_EVSYS_bm); \
1564 PR_PRPA &= (uint8_t)~(PR_ADC_bm|PR_AC_bm); \
1565 PR_PRPC &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1566 PR_PRPD &= (uint8_t)~(PR_USART0_bm|PR_SPI_bm|PR_TC0_bm); \
1567 PR_PRPE &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_TC0_bm); \
1568 PR_PRPF &= (uint8_t)~(PR_USART0_bm|PR_TC0_bm); \
1569 } while(0)
1570
1571 #define power_all_disable() \
1572 do { \
1573 PR_PRGEN |= (uint8_t)(PR_RTC_bm|PR_EVSYS_bm); \
1574 PR_PRPA |= (uint8_t)(PR_ADC_bm|PR_AC_bm); \
1575 PR_PRPC |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1576 PR_PRPD |= (uint8_t)(PR_USART0_bm|PR_SPI_bm|PR_TC0_bm); \
1577 PR_PRPE |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_TC0_bm); \
1578 PR_PRPF |= (uint8_t)(PR_USART0_bm|PR_TC0_bm); \
1579 } while(0)
1580
1581 #endif
1582
1583 #if defined(__AVR_ATxmega16D4__) \
1584 || defined(__AVR_ATxmega32D4__) \
1585 || defined(__AVR_ATxmega64D3__) \
1586 || defined(__AVR_ATxmega128D3__) \
1587 || defined(__AVR_ATxmega192D3__)
1588
1589 #define power_all_enable() \
1590 do { \
1591 PR_PRGEN &= (uint8_t)~(PR_RTC_bm|PR_EVSYS_bm); \
1592 PR_PRPA &= (uint8_t)~(PR_ADC_bm|PR_AC_bm); \
1593 PR_PRPB &= (uint8_t)~(PR_ADC_bm|PR_AC_bm); \
1594 PR_PRPC &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1595 PR_PRPD &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1596 PR_PRPE &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1597 PR_PRPF &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1598 } while(0)
1599
1600
1601 #define power_all_disable() \
1602 do { \
1603 PR_PRGEN|= (uint8_t)(PR_EBI_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm); \
1604 PR_PRPA |= (uint8_t)(PR_ADC_bm|PR_AC_bm); \
1605 PR_PRPB |= (uint8_t)(PR_ADC_bm|PR_AC_bm); \
1606 PR_PRPC |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1607 PR_PRPD |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1608 PR_PRPE |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1609 PR_PRPF |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1610 } while(0)
1611
1612
1613 #elif defined(__AVR_ATxmega32E5__)
1614
1615 #define power_cpld_enable() (PR_PRGEN &= (uint8_t)~(PR_CPLD_bm))
1616 #define power_cpld_disable() (PR_PRGEN |= (uint8_t)PR_CPLD_bm)
1617
1618 #define power_rtc_enable() (PR_PRGEN &= (uint8_t)~(PR_RTC_bm))
1619 #define power_rtc_disable() (PR_PRGEN |= (uint8_t)PR_RTC_bm)
1620
1621 #define power_evsys_enable() (PR_PRGEN &= (uint8_t)~(PR_EVSYS_bm))
1622 #define power_evsys_disable() (PR_PRGEN |= (uint8_t)PR_EVSYS_bm)
1623
1624 #define power_dma_enable() (PR_PRGEN &= (uint8_t)~(PR_DMA_bm))
1625 #define power_dma_disable() (PR_PRGEN |= (uint8_t)PR_DMA_bm)
1626
1627 #define power_daca_enable() (PR_PRPA &= (uint8_t)~(PR_DAC_bm))
1628 #define power_daca_disable() (PR_PRPA |= (uint8_t)PR_DAC_bm)
1629
1630 #define power_adca_enable() (PR_PRPA &= (uint8_t)~(PR_ADC_bm))
1631 #define power_adca_disable() (PR_PRPA |= (uint8_t)PR_ADC_bm)
1632
1633 #define power_aca_enable() (PR_PRPA &= (uint8_t)~(PR_AC_bm))
1634 #define power_aca_disable() (PR_PRPA |= (uint8_t)PR_AC_bm)
1635
1636 #define power_twic_enable() (PR_PRPC &= (uint8_t)~(PR_TWI_bm))
1637 #define power_twic_disable() (PR_PRPC |= (uint8_t)PR_TWI_bm)
1638
1639 #define power_usartc0_enable() (PR_PRPC &= (uint8_t)~(PR_USART0_bm))
1640 #define power_usartc0_disable() (PR_PRPC |= (uint8_t)PR_USART0_bm)
1641
1642 #define power_spic_enable() (PR_PRPC &= (uint8_t)~(PR_SPI_bm))
1643 #define power_spic_disalbe() (PR_PRPC |= (uint8_t)PR_SPI_bm)
1644
1645 #define power_hiresc_enable() (PR_PRPC &= (uint8_t)~(PR_HIRES_bm))
1646 #define power_hiresc_disable() (PR_PRPC |= (uint8_t)PR_HIRES_bm)
1647
1648 #define power_tc1c_enable() (PR_PRPC &= (uint8_t)~(PR_TC1_bm))
1649 #define power_tc1c_disable() (PR_PRPC |= (uint8_t)PR_TC1_bm)
1650
1651 #define power_tc0c_enable() (PR_PRPC &= (uint8_t)~(PR_TC0_bm))
1652 #define power_tc0c_disable() (PR_PRPC |= (uint8_t)PR_TC0_bm)
1653
1654 #define power_usartd0_enable() (PR_PRPD &= (uint8_t)~(PR_USART0_bm))
1655 #define power_usartd0_disable() (PR_PRPD |= (uint8_t)PR_USART0_bm)
1656
1657 #define power_tc1d_enable() (PR_PRPC &= (uint8_t)~(PR_TC1_bm))
1658 #define power_tc1d_disable() (PR_PRPC |= (uint8_t)PR_TC1_bm)
1659
1660 #define power_all_enable() \
1661 do { \
1662 PR_PRGEN &= (uint8_t)~(PR_RTC_bm|PR_EVSYS_bm|PR_CPLD_bm|PR_DMA_bm); \
1663 PR_PRPA &= (uint8_t)~(PR_ADC_bm|PR_AC_bm|PR_DAC_bm); \
1664 PR_PRPC &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1665 PR_PRPD &= (uint8_t)~(PR_USART0_bm|PR_TC1_bm); \
1666 } while(0)
1667
1668
1669 #define power_all_disable() \
1670 do { \
1671 PR_PRGEN|= (uint8_t)(PR_CPLD_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm); \
1672 PR_PRPA |= (uint8_t)(PR_ADC_bm|PR_AC_bm|PR_DAC_bm); \
1673 PR_PRPC |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1674 PR_PRPD |= (uint8_t)(PR_USART0_bm|PR_TC1_bm); \
1675 } while(0)
1676
1677
1678 #elif defined (__AVR_ATxmega64B1__) \
1679 || defined (__AVR_ATxmega64B3__) \
1680 || defined (__AVR_ATxmega128B1__) \
1681 || defined (__AVR_ATxmega128B3__)
1682 #define power_lcd_enable() (PR_PRGEN &= (uint8_t)~(PR_LCD_bm))
1683 #define power_lcd_disable() (PR_PRGEN |= (uint8_t)PR_LCD_bm)
1684
1685 #define power_usb_enable() (PR_PRGEN &= (uint8_t)~(PR_USB_bm))
1686 #define power_usb_disable() (PR_PRGEN |= (uint8_t)PR_USB_bm)
1687
1688 #define power_aes_enable() (PR_PRGEN &= (uint8_t)~(PR_AES_bm))
1689 #define power_aes_disable() (PR_PRGEN |= (uint8_t)PR_AES_bm)
1690
1691 #define power_rtc_enable() (PR_PRGEN &= (uint8_t)~(PR_RTC_bm))
1692 #define power_rtc_disable() (PR_PRGEN |= (uint8_t)PR_RTC_bm)
1693
1694 #define power_evsys_enable() (PR_PRGEN &= (uint8_t)~(PR_EVSYS_bm))
1695 #define power_evsys_disable() (PR_PRGEN |= (uint8_t)PR_EVSYS_bm)
1696
1697 #define power_dma_enable() (PR_PRGEN &= (uint8_t)~(PR_DMA_bm))
1698 #define power_dma_disable() (PR_PRGEN |= (uint8_t)PR_DMA_bm)
1699
1700 #define power_adca_enable() (PR_PRPA &= (uint8_t)~(PR_ADC_bm))
1701 #define power_adca_disable() (PR_PRPA |= (uint8_t)PR_ADC_bm)
1702 #define power_adcb_enable() (PR_PRPB &= (uint8_t)~(PR_ADC_bm))
1703 #define power_adcb_disable() (PR_PRPB |= (uint8_t)PR_ADC_bm)
1704
1705 #define power_aca_enable() (PR_PRPA &= (uint8_t)~(PR_AC_bm))
1706 #define power_aca_disable() (PR_PRPA |= (uint8_t)PR_AC_bm)
1707 #define power_acb_enable() (PR_PRPB &= (uint8_t)~(PR_AC_bm))
1708 #define power_acb_disable() (PR_PRPB |= (uint8_t)PR_AC_bm)
1709
1710 #define power_twic_enable() (PR_PRPC &= (uint8_t)~(PR_TWI_bm))
1711 #define power_twic_disable() (PR_PRPC |= (uint8_t)PR_TWI_bm)
1712
1713 #define power_usartc0_enable() (PR_PRPC &= (uint8_t)~(PR_USART0_bm))
1714 #define power_usartc0_disable() (PR_PRPC |= (uint8_t)PR_USART0_bm)
1715 #define power_usarte0_enable() (PR_PRPE &= (uint8_t)~(PR_USART0_bm))
1716 #define power_usarte0_disable() (PR_PRPE |= (uint8_t)PR_USART0_bm)
1717
1718 #define power_spic_enable() (PR_PRPC &= (uint8_t)~(PR_SPI_bm))
1719 #define power_spic_disable() (PR_PRPC |= (uint8_t)PR_SPI_bm)
1720
1721 #define power_hiresc_enable() (PR_PRPC &= (uint8_t)~(PR_HIRES_bm))
1722 #define power_hiresc_disable() (PR_PRPC |= (uint8_t)PR_HIRES_bm)
1723
1724 #define power_tc1c_enable() (PR_PRPC &= (uint8_t)~(PR_TC1_bm))
1725 #define power_tc1c_disable() (PR_PRPC |= (uint8_t)PR_TC1_bm)
1726
1727 #define power_tc0c_enable() (PR_PRPC &= (uint8_t)~(PR_TC0_bm))
1728 #define power_tc0c_disable() (PR_PRPC |= (uint8_t)PR_TC0_bm)
1729 #define power_tc0e_enable() (PR_PRPE &= (uint8_t)~(PR_TC0_bm))
1730 #define power_tc0e_disable() (PR_PRPE |= (uint8_t)PR_TC0_bm)
1731
1732 #define power_all_enable() \
1733 do { \
1734 PR_PRGEN &= (uint8_t)~(PR_LCD_bm|PR_USB_bm|PR_AES_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm); \
1735 PR_PRPA &= (uint8_t)~(PR_ADC_bm|PR_AC_bm); \
1736 PR_PRPB &= (uint8_t)~(PR_ADC_bm|PR_AC_bm); \
1737 PR_PRPC &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1738 PR_PRPE &= (uint8_t)~(PR_USART0_bm|PR_TC0_bm); \
1739 } while(0)
1740
1741 #define power_all_disable() \
1742 do { \
1743 PR_PRGEN |= (uint8_t)(PR_LCD_bm|PR_USB_bm|PR_AES_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm); \
1744 PR_PRPA |= (uint8_t)(PR_ADC_bm|PR_AC_bm); \
1745 PR_PRPB |= (uint8_t)(PR_ADC_bm|PR_AC_bm); \
1746 PR_PRPC |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1747 PR_PRPE |= (uint8_t)(PR_USART0_bm|PR_TC0_bm); \
1748 } while(0)
1749
1750 #elif defined (__AVR_ATMXT112SL__) \
1751 || defined (__AVR_ATMXT224__) \
1752 || defined (__AVR_ATMXT224E__) \
1753 || defined (__AVR_ATMXT336S__) \
1754 || defined (__AVR_ATMXT540S__) \
1755 || defined (__AVR_ATMXT540SREVA__)
1756
1757 #define power_ctm_enable() (PR_PRGEN &= (uint8_t)~(PR_CTM_bm))
1758 #define power_ctm_disable() (PR_PRGEN |= (uint8_t)PR_CTM_bm)
1759
1760 #define power_aes_enable() (PR_PRGEN &= (uint8_t)~(PR_AES_bm))
1761 #define power_aes_disable() (PR_PRGEN |= (uint8_t)PR_AES_bm)
1762
1763 #define power_ebi_enable() (PR_PRGEN &= (uint8_t)~(PR_EBI_bm))
1764 #define power_ebi_disable() (PR_PRGEN |= (uint8_t)PR_EBI_bm)
1765
1766 #define power_rtc_enable() (PR_PRGEN &= (uint8_t)~(PR_RTC_bm))
1767 #define power_rtc_disable() (PR_PRGEN |= (uint8_t)PR_RTC_bm)
1768
1769 #define power_evsys_enable() (PR_PRGEN &= (uint8_t)~(PR_EVSYS_bm))
1770 #define power_evsys_disable() (PR_PRGEN |= (uint8_t)PR_EVSYS_bm)
1771
1772 #define power_dma_enable() (PR_PRGEN &= (uint8_t)~(PR_DMA_bm))
1773 #define power_dma_disable() (PR_PRGEN |= (uint8_t)PR_DMA_bm)
1774
1775 #define power_daca_enable() (PR_PRPA &= (uint8_t)~(PR_DAC_bm))
1776 #define power_daca_disable() (PR_PRPA |= (uint8_t)PR_DAC_bm)
1777 #define power_dacb_enable() (PR_PRPB &= (uint8_t)~(PR_DAC_bm))
1778 #define power_dacb_disable() (PR_PRPB |= (uint8_t)PR_DAC_bm)
1779
1780 #define power_adca_enable() (PR_PRPA &= (uint8_t)~(PR_ADC_bm))
1781 #define power_adca_disable() (PR_PRPA |= (uint8_t)PR_ADC_bm)
1782 #define power_adcb_enable() (PR_PRPB &= (uint8_t)~(PR_ADC_bm))
1783 #define power_adcb_disable() (PR_PRPB |= (uint8_t)PR_ADC_bm)
1784
1785 #define power_aca_enable() (PR_PRPA &= (uint8_t)~(PR_AC_bm))
1786 #define power_aca_disable() (PR_PRPA |= (uint8_t)PR_AC_bm)
1787 #define power_acb_enable() (PR_PRPB &= (uint8_t)~(PR_AC_bm))
1788 #define power_acb_disable() (PR_PRPB |= (uint8_t)PR_AC_bm)
1789
1790 #define power_twic_enable() (PR_PRPC &= (uint8_t)~(PR_TWI_bm))
1791 #define power_twic_disable() (PR_PRPC |= (uint8_t)PR_TWI_bm)
1792 #define power_twid_enable() (PR_PRPD &= (uint8_t)~(PR_TWI_bm))
1793 #define power_twid_disable() (PR_PRPD |= (uint8_t)PR_TWI_bm)
1794 #define power_twie_enable() (PR_PRPE &= (uint8_t)~(PR_TWI_bm))
1795 #define power_twie_disable() (PR_PRPE |= (uint8_t)PR_TWI_bm)
1796 #define power_twif_enable() (PR_PRPF &= (uint8_t)~(PR_TWI_bm))
1797 #define power_twif_disable() (PR_PRPF |= (uint8_t)PR_TWI_bm)
1798
1799 #define power_usartc1_enable() (PR_PRPC &= (uint8_t)~(PR_USART1_bm))
1800 #define power_usartc1_disable() (PR_PRPC |= (uint8_t)PR_USART1_bm)
1801 #define power_usartd1_enable() (PR_PRPD &= (uint8_t)~(PR_USART1_bm))
1802 #define power_usartd1_disable() (PR_PRPD |= (uint8_t)PR_USART1_bm)
1803 #define power_usarte1_enable() (PR_PRPE &= (uint8_t)~(PR_USART1_bm))
1804 #define power_usarte1_disable() (PR_PRPE |= (uint8_t)PR_USART1_bm)
1805 #define power_usartf1_enable() (PR_PRPF &= (uint8_t)~(PR_USART1_bm))
1806 #define power_usartf1_disable() (PR_PRPF |= (uint8_t)PR_USART1_bm)
1807
1808 #define power_usartc0_enable() (PR_PRPC &= (uint8_t)~(PR_USART0_bm))
1809 #define power_usartc0_disable() (PR_PRPC |= (uint8_t)PR_USART0_bm)
1810 #define power_usartd0_enable() (PR_PRPD &= (uint8_t)~(PR_USART0_bm))
1811 #define power_usartd0_disable() (PR_PRPD |= (uint8_t)PR_USART0_bm)
1812 #define power_usarte0_enable() (PR_PRPE &= (uint8_t)~(PR_USART0_bm))
1813 #define power_usarte0_disable() (PR_PRPE |= (uint8_t)PR_USART0_bm)
1814 #define power_usartf0_enable() (PR_PRPF &= (uint8_t)~(PR_USART0_bm))
1815 #define power_usartf0_disable() (PR_PRPF |= (uint8_t)PR_USART0_bm)
1816
1817 #define power_spic_enable() (PR_PRPC &= (uint8_t)~(PR_SPI_bm))
1818 #define power_spic_disable() (PR_PRPC |= (uint8_t)PR_SPI_bm)
1819 #define power_spid_enable() (PR_PRPD &= (uint8_t)~(PR_SPI_bm))
1820 #define power_spid_disable() (PR_PRPD |= (uint8_t)PR_SPI_bm)
1821 #define power_spie_enable() (PR_PRPE &= (uint8_t)~(PR_SPI_bm))
1822 #define power_spie_disable() (PR_PRPE |= (uint8_t)PR_SPI_bm)
1823 #define power_spif_enable() (PR_PRPF &= (uint8_t)~(PR_SPI_bm))
1824 #define power_spif_disable() (PR_PRPF |= (uint8_t)PR_SPI_bm)
1825
1826 #define power_hiresc_enable() (PR_PRPC &= (uint8_t)~(PR_HIRES_bm))
1827 #define power_hiresc_disable() (PR_PRPC |= (uint8_t)PR_HIRES_bm)
1828 #define power_hiresd_enable() (PR_PRPD &= (uint8_t)~(PR_HIRES_bm))
1829 #define power_hiresd_disable() (PR_PRPD |= (uint8_t)PR_HIRES_bm)
1830 #define power_hirese_enable() (PR_PRPE &= (uint8_t)~(PR_HIRES_bm))
1831 #define power_hirese_disable() (PR_PRPE |= (uint8_t)PR_HIRES_bm)
1832 #define power_hiresf_enable() (PR_PRPF &= (uint8_t)~(PR_HIRES_bm))
1833 #define power_hiresf_disable() (PR_PRPF |= (uint8_t)PR_HIRES_bm)
1834
1835 #define power_tc1c_enable() (PR_PRPC &= (uint8_t)~(PR_TC1_bm))
1836 #define power_tc1c_disable() (PR_PRPC |= (uint8_t)PR_TC1_bm)
1837 #define power_tc1d_enable() (PR_PRPD &= (uint8_t)~(PR_TC1_bm))
1838 #define power_tc1d_disable() (PR_PRPD |= (uint8_t)PR_TC1_bm)
1839 #define power_tc1e_enable() (PR_PRPE &= (uint8_t)~(PR_TC1_bm))
1840 #define power_tc1e_disable() (PR_PRPE |= (uint8_t)PR_TC1_bm)
1841 #define power_tc1f_enable() (PR_PRPF &= (uint8_t)~(PR_TC1_bm))
1842 #define power_tc1f_disable() (PR_PRPF |= (uint8_t)PR_TC1_bm)
1843
1844 #define power_tc0c_enable() (PR_PRPC &= (uint8_t)~(PR_TC0_bm))
1845 #define power_tc0c_disable() (PR_PRPC |= (uint8_t)PR_TC0_bm)
1846 #define power_tc0d_enable() (PR_PRPD &= (uint8_t)~(PR_TC0_bm))
1847 #define power_tc0d_disable() (PR_PRPD |= (uint8_t)PR_TC0_bm)
1848 #define power_tc0e_enable() (PR_PRPE &= (uint8_t)~(PR_TC0_bm))
1849 #define power_tc0e_disable() (PR_PRPE |= (uint8_t)PR_TC0_bm)
1850 #define power_tc0f_enable() (PR_PRPF &= (uint8_t)~(PR_TC0_bm))
1851 #define power_tc0f_disable() (PR_PRPF |= (uint8_t)PR_TC0_bm)
1852
1853 #define power_all_enable() \
1854 do { \
1855 PR_PRGEN &= (uint8_t)~(PR_CTM_bm|PR_EBI_bm|PR_AES_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm); \
1856 PR_PRPA &= (uint8_t)~(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
1857 PR_PRPB &= (uint8_t)~(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
1858 PR_PRPC &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1859 PR_PRPD &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1860 PR_PRPE &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1861 PR_PRPF &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1862 } while(0)
1863
1864 #define power_all_disable() \
1865 do { \
1866 PR_PRGEN |= (uint8_t)(PR_CTM_bm|PR_EBI_bm|PR_AES_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm); \
1867 PR_PRPA |= (uint8_t)(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
1868 PR_PRPB |= (uint8_t)(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
1869 PR_PRPC |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1870 PR_PRPD |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1871 PR_PRPE |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1872 PR_PRPF |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
1873 } while(0)
1874
1875 #elif defined(__AVR_ATmega640__) \
1876 || defined(__AVR_ATmega1280__) \
1877 || defined(__AVR_ATmega1281__) \
1878 || defined(__AVR_ATmega2560__) \
1879 || defined(__AVR_ATmega2561__)
1880
1881 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
1882 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
1883
1884 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
1885 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
1886
1887 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
1888 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
1889
1890 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
1891 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
1892
1893 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
1894 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
1895
1896 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
1897 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
1898
1899 #define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRTIM3))
1900 #define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRTIM3))
1901
1902 #define power_timer4_enable() (PRR1 &= (uint8_t)~(1 << PRTIM4))
1903 #define power_timer4_disable() (PRR1 |= (uint8_t)(1 << PRTIM4))
1904
1905 #define power_timer5_enable() (PRR1 &= (uint8_t)~(1 << PRTIM5))
1906 #define power_timer5_disable() (PRR1 |= (uint8_t)(1 << PRTIM5))
1907
1908 #define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
1909 #define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
1910
1911 #define power_usart1_enable() (PRR1 &= (uint8_t)~(1 << PRUSART1))
1912 #define power_usart1_disable() (PRR1 |= (uint8_t)(1 << PRUSART1))
1913
1914 #define power_usart2_enable() (PRR1 &= (uint8_t)~(1 << PRUSART2))
1915 #define power_usart2_disable() (PRR1 |= (uint8_t)(1 << PRUSART2))
1916
1917 #define power_usart3_enable() (PRR1 &= (uint8_t)~(1 << PRUSART3))
1918 #define power_usart3_disable() (PRR1 |= (uint8_t)(1 << PRUSART3))
1919
1920 #define power_all_enable() \
1921 do{ \
1922 PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
1923 PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTIM5)|(1<<PRUSART1)|(1<<PRUSART2)|(1<<PRUSART3)); \
1924 }while(0)
1925
1926 #define power_all_disable() \
1927 do{ \
1928 PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
1929 PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTIM5)|(1<<PRUSART1)|(1<<PRUSART2)|(1<<PRUSART3)); \
1930 }while(0)
1931
1932
1933 #elif defined(__AVR_ATmega128RFA1__)
1934
1935 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
1936 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
1937
1938 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
1939 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
1940
1941 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
1942 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
1943
1944 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
1945 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
1946
1947 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
1948 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
1949
1950 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
1951 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
1952
1953 #define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRTIM3))
1954 #define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRTIM3))
1955
1956 #define power_timer4_enable() (PRR1 &= (uint8_t)~(1 << PRTIM4))
1957 #define power_timer4_disable() (PRR1 |= (uint8_t)(1 << PRTIM4))
1958
1959 #define power_timer5_enable() (PRR1 &= (uint8_t)~(1 << PRTIM5))
1960 #define power_timer5_disable() (PRR1 |= (uint8_t)(1 << PRTIM5))
1961
1962 #define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
1963 #define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
1964
1965 #define power_usart1_enable() (PRR1 &= (uint8_t)~(1 << PRUSART1))
1966 #define power_usart1_disable() (PRR1 |= (uint8_t)(1 << PRUSART1))
1967
1968 #define power_all_enable() \
1969 do{ \
1970 PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
1971 PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTIM5)|(1<<PRUSART1)); \
1972 }while(0)
1973
1974 #define power_all_disable() \
1975 do{ \
1976 PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
1977 PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTIM5)|(1<<PRUSART1)); \
1978 }while(0)
1979
1980 #elif defined(__AVR_ATmega256RFR2__) \
1981 || defined(__AVR_ATmega128RFR2__) \
1982 || defined(__AVR_ATmega64RFR2__) \
1983 || defined(__AVR_ATmega256RFA2__) \
1984 || defined(__AVR_ATmega128RFA2__) \
1985 || defined(__AVR_ATmega64RFA2__)
1986
1987 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
1988 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
1989
1990 #define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
1991 #define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
1992
1993 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
1994 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
1995
1996 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
1997 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
1998
1999 #define power_pga_enable() (PRR0 &= (uint8_t)~(1 << PRPGA))
2000 #define power_pga_disable() (PRR0 |= (uint8_t)(1 << PRPGA))
2001
2002 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
2003 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
2004
2005 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
2006 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
2007
2008 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
2009 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
2010
2011 #define power_usart1_enable() (PRR1 &= (uint8_t)~(1 << PRUSART1))
2012 #define power_usart1_disable() (PRR1 |= (uint8_t)(1 << PRUSART1))
2013
2014 #define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRTIM3))
2015 #define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRTIM3))
2016
2017 #define power_timer4_enable() (PRR1 &= (uint8_t)~(1 << PRTIM4))
2018 #define power_timer4_disable() (PRR1 |= (uint8_t)(1 << PRTIM4))
2019
2020 #define power_timer5_enable() (PRR1 &= (uint8_t)~(1 << PRTIM5))
2021 #define power_timer5_disable() (PRR1 |= (uint8_t)(1 << PRTIM5))
2022
2023 #define power_transceiver_enable() (PRR1 &= (uint8_t)~(1 << PRTRX24))
2024 #define power_transceiver_disable() (PRR1 |= (uint8_t)(1 << PRTRX24))
2025
2026 #define power_ram0_enable() (PRR2 &= (uint8_t)~(1 << PRRAM0))
2027 #define power_ram0_disable() (PRR2 |= (uint8_t)(1 << PRRAM0))
2028
2029 #define power_ram1_enable() (PRR2 &= (uint8_t)~(1 << PRRAM1))
2030 #define power_ram1_disable() (PRR2 |= (uint8_t)(1 << PRRAM1))
2031
2032 #define power_ram2_enable() (PRR2 &= (uint8_t)~(1 << PRRAM2))
2033 #define power_ram2_disable() (PRR2 |= (uint8_t)(1 << PRRAM2))
2034
2035 #define power_ram3_enable() (PRR2 &= (uint8_t)~(1 << PRRAM3))
2036 #define power_ram3_disable() (PRR2 |= (uint8_t)(1 << PRRAM3))
2037
2038 #define power_all_enable() \
2039 do{ \
2040 PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
2041 PRR1 &= (uint8_t)~((1<<PRUSART1)|(1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTRX24)); \
2042 PRR2 &= (uint8_t)~((1<<PRRAM0)|(1<<PRRAM1)|(1<<PRRAM2)|(1<<PRRAM3)); \
2043 }while(0)
2044
2045 #define power_all_disable() \
2046 do{ \
2047 PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
2048 PRR1 |= (uint8_t)((1<<PRUSART1)|(1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTRX24)); \
2049 PRR2 |= (uint8_t)((1<<PRRAM0)|(1<<PRRAM1)|(1<<PRRAM2)|(1<<PRRAM3)); \
2050 }while(0)
2051
2052 #elif defined(__AVR_AT90USB646__) \
2053 || defined(__AVR_AT90USB647__) \
2054 || defined(__AVR_AT90USB1286__) \
2055 || defined(__AVR_AT90USB1287__)
2056
2057 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
2058 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
2059
2060 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
2061 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
2062
2063 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
2064 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
2065
2066 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
2067 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
2068
2069 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
2070 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
2071
2072 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
2073 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
2074
2075 #define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRTIM3))
2076 #define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRTIM3))
2077
2078 #define power_usart1_enable() (PRR1 &= (uint8_t)~(1 << PRUSART1))
2079 #define power_usart1_disable() (PRR1 |= (uint8_t)(1 << PRUSART1))
2080
2081 #define power_usb_enable() (PRR1 &= (uint8_t)~(1 << PRUSB))
2082 #define power_usb_disable() (PRR1 |= (uint8_t)(1 << PRUSB))
2083
2084 #define power_all_enable() \
2085 do{ \
2086 PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
2087 PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
2088 }while(0)
2089
2090 #define power_all_disable() \
2091 do{ \
2092 PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
2093 PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
2094 }while(0)
2095
2096
2097 #elif defined(__AVR_ATmega32U4__) \
2098 || defined(__AVR_ATmega16U4__)
2099
2100
2101 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
2102 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
2103
2104 #define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
2105 #define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
2106
2107 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
2108 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
2109
2110 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
2111 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
2112
2113 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
2114 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
2115
2116 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
2117 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
2118
2119 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
2120 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
2121
2122 #define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRTIM3))
2123 #define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRTIM3))
2124
2125 #define power_usart1_enable() (PRR1 &= (uint8_t)~(1 << PRUSART1))
2126 #define power_usart1_disable() (PRR1 |= (uint8_t)(1 << PRUSART1))
2127
2128 #define power_usb_enable() (PRR1 &= (uint8_t)~(1 << PRUSB))
2129 #define power_usb_disable() (PRR1 |= (uint8_t)(1 << PRUSB))
2130
2131 #define power_all_enable() \
2132 do{ \
2133 PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRUSART0)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
2134 PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
2135 }while(0)
2136
2137 #define power_all_disable() \
2138 do{ \
2139 PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRUSART0)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
2140 PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
2141 }while(0)
2142
2143
2144 #elif defined(__AVR_ATmega32U6__)
2145
2146
2147 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
2148 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
2149
2150 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
2151 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
2152
2153 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
2154 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
2155
2156 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
2157 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
2158
2159 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
2160 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
2161
2162 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
2163 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
2164
2165 #define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRTIM3))
2166 #define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRTIM3))
2167
2168 #define power_usart1_enable() (PRR1 &= (uint8_t)~(1 << PRUSART1))
2169 #define power_usart1_disable() (PRR1 |= (uint8_t)(1 << PRUSART1))
2170
2171 #define power_usb_enable() (PRR1 &= (uint8_t)~(1 << PRUSB))
2172 #define power_usb_disable() (PRR1 |= (uint8_t)(1 << PRUSB))
2173
2174 #define power_all_enable() \
2175 do{ \
2176 PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
2177 PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
2178 }while(0)
2179
2180 #define power_all_disable() \
2181 do{ \
2182 PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
2183 PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
2184 }while(0)
2185
2186
2187 #elif defined(__AVR_AT90PWM1__)
2188
2189 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
2190 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
2191
2192 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
2193 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
2194
2195 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
2196 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
2197
2198 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
2199 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
2200
2201 /* Power Stage Controller 0 */
2202 #define power_psc0_enable() (PRR &= (uint8_t)~(1 << PRPSC0))
2203 #define power_psc0_disable() (PRR |= (uint8_t)(1 << PRPSC0))
2204
2205 /* Power Stage Controller 1 */
2206 #define power_psc1_enable() (PRR &= (uint8_t)~(1 << PRPSC1))
2207 #define power_psc1_disable() (PRR |= (uint8_t)(1 << PRPSC1))
2208
2209 /* Power Stage Controller 2 */
2210 #define power_psc2_enable() (PRR &= (uint8_t)~(1 << PRPSC2))
2211 #define power_psc2_disable() (PRR |= (uint8_t)(1 << PRPSC2))
2212
2213 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC0)|(1<<PRPSC1)|(1<<PRPSC2)))
2214 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC0)|(1<<PRPSC1)|(1<<PRPSC2)))
2215
2216
2217 #elif defined(__AVR_AT90PWM2__) \
2218 || defined(__AVR_AT90PWM2B__) \
2219 || defined(__AVR_AT90PWM3__) \
2220 || defined(__AVR_AT90PWM3B__) \
2221 || defined(__AVR_AT90PWM216__) \
2222 || defined(__AVR_AT90PWM316__)
2223
2224 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
2225 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
2226
2227 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
2228 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
2229
2230 #if defined(__AVR_AT90PWM216__) || defined(__AVR_AT90PWM316__)
2231
2232 #define power_usart_enable() (PRR &= (uint8_t)~(1 << PRUSART))
2233 #define power_usart_disable() (PRR |= (uint8_t)(1 << PRUSART))
2234
2235 #else
2236
2237 #define power_usart_enable() (PRR &= (uint8_t)~(1 << PRUSART0))
2238 #define power_usart_disable() (PRR |= (uint8_t)(1 << PRUSART0))
2239
2240 #endif
2241
2242 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
2243 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
2244
2245 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
2246 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
2247
2248 /* Power Stage Controller 0 */
2249 #define power_psc0_enable() (PRR &= (uint8_t)~(1 << PRPSC0))
2250 #define power_psc0_disable() (PRR |= (uint8_t)(1 << PRPSC0))
2251
2252 /* Power Stage Controller 1 */
2253 #define power_psc1_enable() (PRR &= (uint8_t)~(1 << PRPSC1))
2254 #define power_psc1_disable() (PRR |= (uint8_t)(1 << PRPSC1))
2255
2256 /* Power Stage Controller 2 */
2257 #define power_psc2_enable() (PRR &= (uint8_t)~(1 << PRPSC2))
2258 #define power_psc2_disable() (PRR |= (uint8_t)(1 << PRPSC2))
2259
2260 #if defined(__AVR_AT90PWM216__) || defined(__AVR_AT90PWM316__)
2261
2262 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC0)|(1<<PRPSC1)|(1<<PRPSC2)))
2263 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC0)|(1<<PRPSC1)|(1<<PRPSC2)))
2264
2265 #else
2266
2267 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC0)|(1<<PRPSC1)|(1<<PRPSC2)))
2268 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC0)|(1<<PRPSC1)|(1<<PRPSC2)))
2269
2270 #endif
2271
2272
2273 #elif defined(__AVR_AT90PWM81__) \
2274 || defined(__AVR_AT90PWM161__)
2275
2276 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
2277 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
2278
2279 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
2280 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
2281
2282 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
2283 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
2284
2285 /* Reduced Power Stage Controller */
2286 #define power_pscr_enable() (PRR &= (uint8_t)~(1 << PRPSCR))
2287 #define power_pscr_disable() (PRR |= (uint8_t)(1 << PRPSCR))
2288
2289 /* Power Stage Controller 2 */
2290 #define power_psc2_enable() (PRR &= (uint8_t)~(1 << PRPSC2))
2291 #define power_psc2_disable() (PRR |= (uint8_t)(1 << PRPSC2))
2292
2293 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM1)|(1<<PRPSCR)|(1<<PRPSC2)))
2294 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM1)|(1<<PRPSCR)|(1<<PRPSC2)))
2295
2296
2297 #elif defined(__AVR_ATmega165__) \
2298 || defined(__AVR_ATmega165A__) \
2299 || defined(__AVR_ATmega165P__) \
2300 || defined(__AVR_ATmega165PA__) \
2301 || defined(__AVR_ATmega325__) \
2302 || defined(__AVR_ATmega325A__) \
2303 || defined(__AVR_ATmega325P__) \
2304 || defined(__AVR_ATmega325PA__) \
2305 || defined(__AVR_ATmega3250__) \
2306 || defined(__AVR_ATmega3250A__) \
2307 || defined(__AVR_ATmega3250P__) \
2308 || defined(__AVR_ATmega3250PA__) \
2309 || defined(__AVR_ATmega645__) \
2310 || defined(__AVR_ATmega645A__) \
2311 || defined(__AVR_ATmega645P__) \
2312 || defined(__AVR_ATmega6450__) \
2313 || defined(__AVR_ATmega6450A__) \
2314 || defined(__AVR_ATmega6450P__)
2315
2316 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
2317 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
2318
2319 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
2320 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
2321
2322 #define power_usart0_enable() (PRR &= (uint8_t)~(1 << PRUSART0))
2323 #define power_usart0_disable() (PRR |= (uint8_t)(1 << PRUSART0))
2324
2325 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
2326 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
2327
2328 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM1)))
2329 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM1)))
2330
2331
2332 #elif defined(__AVR_ATmega169__) \
2333 || defined(__AVR_ATmega169A__) \
2334 || defined(__AVR_ATmega169P__) \
2335 || defined(__AVR_ATmega169PA__) \
2336 || defined(__AVR_ATmega329__) \
2337 || defined(__AVR_ATmega329A__) \
2338 || defined(__AVR_ATmega329P__) \
2339 || defined(__AVR_ATmega329PA__) \
2340 || defined(__AVR_ATmega3290__) \
2341 || defined(__AVR_ATmega3290A__) \
2342 || defined(__AVR_ATmega3290P__) \
2343 || defined(__AVR_ATmega3290PA__) \
2344 || defined(__AVR_ATmega649__) \
2345 || defined(__AVR_ATmega649A__) \
2346 || defined(__AVR_ATmega649P__) \
2347 || defined(__AVR_ATmega6490__) \
2348 || defined(__AVR_ATmega6490A__) \
2349 || defined(__AVR_ATmega6490P__)
2350
2351 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
2352 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
2353
2354 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
2355 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
2356
2357 #define power_usart0_enable() (PRR &= (uint8_t)~(1 << PRUSART0))
2358 #define power_usart0_disable() (PRR |= (uint8_t)(1 << PRUSART0))
2359
2360 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
2361 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
2362
2363 #define power_lcd_enable() (PRR &= (uint8_t)~(1 << PRLCD))
2364 #define power_lcd_disable() (PRR |= (uint8_t)(1 << PRLCD))
2365
2366 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM1)|(1<<PRLCD)))
2367 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM1)|(1<<PRLCD)))
2368
2369
2370 #elif defined(__AVR_ATmega164A__) \
2371 || defined(__AVR_ATmega164P__) \
2372 || defined(__AVR_ATmega324A__) \
2373 || defined(__AVR_ATmega324P__) \
2374 || defined(__AVR_ATmega324PA__) \
2375 || defined(__AVR_ATmega644P__) \
2376 || defined(__AVR_ATmega644A__) \
2377 || defined(__AVR_ATmega644PA__)
2378
2379 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
2380 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
2381
2382 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
2383 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
2384
2385 #define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
2386 #define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
2387
2388 #define power_usart1_enable() (PRR0 &= (uint8_t)~(1 << PRUSART1))
2389 #define power_usart1_disable() (PRR0 |= (uint8_t)(1 << PRUSART1))
2390
2391 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
2392 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
2393
2394 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
2395 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
2396
2397 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
2398 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
2399
2400 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
2401 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
2402
2403 #define power_all_enable() (PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRUSART1)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
2404 #define power_all_disable() (PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRUSART1)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
2405
2406
2407 #elif defined(__AVR_ATmega644__) \
2408 || defined(__AVR_ATmega164PA__)
2409
2410 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
2411 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
2412
2413 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
2414 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
2415
2416 #define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
2417 #define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
2418
2419 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
2420 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
2421
2422 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
2423 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
2424
2425 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
2426 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
2427
2428 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
2429 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
2430
2431 #define power_all_enable() (PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
2432 #define power_all_disable() (PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
2433
2434
2435 #elif defined(__AVR_ATmega406__)
2436
2437 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
2438 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
2439
2440 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
2441 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
2442
2443 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
2444 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
2445
2446 /* Voltage ADC */
2447 #define power_vadc_enable() (PRR0 &= (uint8_t)~(1 << PRVADC))
2448 #define power_vadc_disable() (PRR0 |= (uint8_t)(1 << PRVADC))
2449
2450 #define power_all_enable() (PRR0 &= (uint8_t)~((1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRVADC)))
2451 #define power_all_disable() (PRR0 |= (uint8_t)((1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRVADC)))
2452
2453
2454 #elif defined(__AVR_ATmega48__) \
2455 || defined(__AVR_ATmega48A__) \
2456 || defined(__AVR_ATmega48PA__) \
2457 || defined(__AVR_ATmega48P__) \
2458 || defined(__AVR_ATmega88__) \
2459 || defined(__AVR_ATmega88A__) \
2460 || defined(__AVR_ATmega88P__) \
2461 || defined(__AVR_ATmega88PA__) \
2462 || defined(__AVR_ATmega168__) \
2463 || defined(__AVR_ATmega168A__) \
2464 || defined(__AVR_ATmega168P__) \
2465 || defined(__AVR_ATmega168PA__) \
2466 || defined(__AVR_ATmega328__) \
2467 || defined(__AVR_ATmega328P__) \
2468 || defined(__AVR_ATtiny828__) \
2469 || defined(__AVR_ATtiny841__)
2470
2471 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
2472 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
2473
2474 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
2475 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
2476
2477 #define power_usart0_enable() (PRR &= (uint8_t)~(1 << PRUSART0))
2478 #define power_usart0_disable() (PRR |= (uint8_t)(1 << PRUSART0))
2479
2480 #if defined(__AVR_ATtiny841__)
2481
2482 #define power_usart1_enable() (PRR &= (uint8_t)~(1 << PRUSART1))
2483 #define power_usart1_disable() (PRR |= (uint8_t)(1 << PRUSART1))
2484
2485 #endif
2486
2487 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
2488 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
2489
2490 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
2491 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
2492
2493 #if !defined(__AVR_ATtiny828__)
2494
2495 #define power_timer2_enable() (PRR &= (uint8_t)~(1 << PRTIM2))
2496 #define power_timer2_disable() (PRR |= (uint8_t)(1 << PRTIM2))
2497
2498 #endif
2499
2500 #define power_twi_enable() (PRR &= (uint8_t)~(1 << PRTWI))
2501 #define power_twi_disable() (PRR |= (uint8_t)(1 << PRTWI))
2502
2503 #if defined(__AVR_ATtiny828__)
2504
2505 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTWI)))
2506 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTWI)))
2507
2508 #elif defined(__AVR_ATtiny841__)
2509
2510 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRUSART1)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
2511 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRUSART1)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
2512
2513 #else
2514
2515 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
2516 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
2517
2518 #endif
2519
2520 #elif defined(__AVR_ATtiny48__) \
2521 || defined(__AVR_ATtiny88__)
2522
2523 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
2524 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
2525
2526 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
2527 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
2528
2529 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
2530 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
2531
2532 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
2533 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
2534
2535 #define power_twi_enable() (PRR &= (uint8_t)~(1 << PRTWI))
2536 #define power_twi_disable() (PRR |= (uint8_t)(1 << PRTWI))
2537
2538 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTWI)))
2539 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTWI)))
2540
2541
2542 #elif defined(__AVR_ATtiny24__) \
2543 || defined(__AVR_ATtiny24A__) \
2544 || defined(__AVR_ATtiny44__) \
2545 || defined(__AVR_ATtiny44A__) \
2546 || defined(__AVR_ATtiny84__) \
2547 || defined(__AVR_ATtiny84A__) \
2548 || defined(__AVR_ATtiny25__) \
2549 || defined(__AVR_ATtiny45__) \
2550 || defined(__AVR_ATtiny85__) \
2551 || defined(__AVR_ATtiny261__) \
2552 || defined(__AVR_ATtiny261A__) \
2553 || defined(__AVR_ATtiny461__) \
2554 || defined(__AVR_ATtiny461A__) \
2555 || defined(__AVR_ATtiny861__) \
2556 || defined(__AVR_ATtiny861A__) \
2557 || defined(__AVR_ATtiny43U__)
2558
2559 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
2560 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
2561
2562 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
2563 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
2564
2565 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
2566 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
2567
2568 /* Universal Serial Interface */
2569 #define power_usi_enable() (PRR &= (uint8_t)~(1 << PRUSI))
2570 #define power_usi_disable() (PRR |= (uint8_t)(1 << PRUSI))
2571
2572 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRUSI)))
2573 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRUSI)))
2574
2575 #elif defined(__AVR_ATmega1284__)
2576
2577 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
2578 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
2579
2580 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
2581 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
2582
2583 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
2584 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
2585
2586 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
2587 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
2588
2589 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
2590 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
2591
2592 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
2593 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
2594
2595 #define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRTIM3))
2596 #define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRTIM3))
2597
2598 #define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
2599 #define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
2600
2601 #define power_all_enable() \
2602 do{ \
2603 PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
2604 PRR1 &= (uint8_t)~(1<<PRTIM3); \
2605 }while(0)
2606
2607 #define power_all_disable() \
2608 do{ \
2609 PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
2610 PRR1 |= (uint8_t)(1<<PRTIM3); \
2611 }while(0)
2612
2613 #elif defined(__AVR_ATmega1284P__)
2614
2615
2616 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
2617 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
2618
2619 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
2620 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
2621
2622 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
2623 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
2624
2625 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
2626 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
2627
2628 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
2629 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
2630
2631 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
2632 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
2633
2634 #define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRTIM3))
2635 #define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRTIM3))
2636
2637 #define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
2638 #define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
2639
2640 #define power_usart1_enable() (PRR0 &= (uint8_t)~(1 << PRUSART1))
2641 #define power_usart1_disable() (PRR0 |= (uint8_t)(1 << PRUSART1))
2642
2643 #define power_all_enable() \
2644 do{ \
2645 PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)|(1<<PRUSART1)); \
2646 PRR1 &= (uint8_t)~(1<<PRTIM3); \
2647 }while(0)
2648
2649 #define power_all_disable() \
2650 do{ \
2651 PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)|(1<<PRUSART1)); \
2652 PRR1 |= (uint8_t)(1<<PRTIM3); \
2653 }while(0)
2654
2655
2656 #elif defined(__AVR_ATmega32HVB__) \
2657 || defined(__AVR_ATmega32HVBREVB__) \
2658 || defined(__AVR_ATmega16HVB__) \
2659 || defined(__AVR_ATmega16HVBREVB__) \
2660 || defined(__AVR_ATmega26HVG__) \
2661 || defined(__AVR_ATmega48HVF__)
2662
2663
2664 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
2665 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
2666
2667 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
2668 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
2669
2670 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
2671 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
2672
2673 /* Voltage ADC */
2674 #define power_vadc_enable() (PRR0 &= (uint8_t)~(1 << PRVADC))
2675 #define power_vadc_disable() (PRR0 |= (uint8_t)(1 << PRVADC))
2676
2677 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
2678 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
2679
2680 #define power_vrm_enable() (PRR0 &= (uint8_t)~(1 << PRVRM))
2681 #define power_vrm_disable() (PRR0 |= (uint8_t)(1 << PRVRM))
2682
2683 #define power_all_enable() (PRR0 &= (uint8_t)~((1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRVADC)|(1<<PRSPI)|(1<<PRVRM)))
2684 #define power_all_disable() (PRR0 |= (uint8_t)((1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRVADC)|(1<<PRSPI)|(1<<PRVRM)))
2685
2686
2687 #elif defined (__AVR_ATA5790__) \
2688 || defined (__AVR_ATA5790N__) \
2689 || defined (__AVR_ATA5795__)
2690
2691 // Enable the voltage monitor
2692 #define power_vmonitor_enable() (PRR0 &= (uint8_t)~(1 << PRVM))
2693 #define power_vmonitor_disable() (PRR0 |= (uint8_t)(1 << PRVM))
2694
2695 #define power_irdriver_enable() (PRR0 &= (uint8_t)~(1 << PRDS))
2696 #define power_irdriver_disable() (PRR0 |= (uint8_t)(1 << PRDS))
2697
2698 #define power_crypto_enable() (PRR0 &= (uint8_t)~(1 << PRCU))
2699 #define power_crypto_disable() (PRR0 |= (uint8_t)(1 << PRCU))
2700
2701 #define power_timermodulator_enable() (PRR0 &= (uint8_t)~(1 << PRTM))
2702 #define power_timermodulator_disable() (PRR0 |= (uint8_t)(1 << PRTM))
2703
2704 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRT1))
2705 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRT1))
2706
2707 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRT2))
2708 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRT2))
2709
2710 #define power_timer3_enable() (PRR0 &= (uint8_t)~(1 << PRT3))
2711 #define power_timer3_disable() (PRR0 |= (uint8_t)(1 << PRT3))
2712
2713 #define power_spi_enable() (PRR1 &= (uint8_t)~(1 << PRSPI))
2714 #define power_spi_disable() (PRR1 |= (uint8_t)(1 << PRSPI))
2715
2716 #define power_cinterface_enable() (PRR1 &= (uint8_t)~(1 << PRCI))
2717 #define power_cinterface_disable() (PRR1 |= (uint8_t)(1 << PRCI))
2718
2719 #if defined(__AVR_ATA5790__) \
2720 || defined(__AVR_ATA5790N__)
2721
2722 #define power_lfreceiver_enable() (PRR0 &= (uint8_t)~(1 << PRLFR))
2723 #define power_lfreceiver_disable() (PRR0 |= (uint8_t)(1 << PRLFR))
2724
2725 #define power_all_enable() \
2726 do{ \
2727 PRR0 &= (uint8_t)~((1<<PRVM)|(1<<PRDS)|(1<<PRCU)|(1<<PRTM)|(1<<PRT3)|(1<<PRT2)|(1<<PRT1)|(1<<PRLFR)); \
2728 PRR1 &= (uint8_t)~((1<<PRSPI)|(1<<PRCI)); \
2729 }while(0)
2730
2731 #define power_all_disable() \
2732 do{ \
2733 PRR0 |= (uint8_t)((1<<PRVM)|(1<<PRDS)|(1<<PRCU)|(1<<PRTM)|(1<<PRT3)|(1<<PRT2)|(1<<PRT1)|(1<<PRLFR)); \
2734 PRR1 |= (uint8_t)((1<<PRSPI)|(1<<PRCI)); \
2735 }while(0)
2736
2737 #elif defined(__AVR_ATA5795__)
2738
2739 #define power_all_enable() \
2740 do{ \
2741 PRR0 &= (uint8_t)~((1<<PRVM)|(1<<PRDS)|(1<<PRCU)|(1<<PRTM)|(1<<PRT3)|(1<<PRT2)|(1<<PRT1)); \
2742 PRR1 &= (uint8_t)~((1<<PRSPI)|(1<<PRCI)); \
2743 }while(0)
2744
2745 #define power_all_disable() \
2746 do{ \
2747 PRR0 |= (uint8_t)((1<<PRVM)|(1<<PRDS)|(1<<PRCU)|(1<<PRTM)|(1<<PRT3)|(1<<PRT2)|(1<<PRT1)); \
2748 PRR1 |= (uint8_t)((1<<PRSPI)|(1<<PRCI)); \
2749 }while(0)
2750
2751 #endif
2752
2753 #elif defined(__AVR_ATA5831__)
2754
2755 #define power_clock_output_enable() (PRR0 &= (uint8_t)~(1 << PRCO))
2756 #define power_clock_output_disable() (PRR0 |= (uint8_t)(1 << PRCO))
2757
2758 #define power_voltage_monitor_enable() (PRR0 &= (uint8_t)~(1 << PRVM))
2759 #define power_voltage_monitor_disable() (PRR0 |= (uint8_t)(1 << PRVM))
2760
2761 #define power_crc_enable() (PRR0 &= (uint8_t)~(1 << PRCRC))
2762 #define power_crc_disable() (PRR0 |= (uint8_t)(1 << PRCRC))
2763
2764 #define power_transmit_dsp_control_enable() (PRR0 &= (uint8_t)~(1 << PRTXDC))
2765 #define power_transmit_dsp_control_disable() (PRR0 |= (uint8_t)(1 << PRTXDC))
2766
2767 #define power_receive_dsp_control_enable() (PRR0 &= (uint8_t)~(1 << PRRXDC))
2768 #define power_receive_dsp_control_disable() (PRR0 |= (uint8_t)(1 << PRRXDC))
2769
2770 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
2771 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
2772
2773 #define power_timer1_enable() (PRR1 &= (uint8_t)~(1 << PRT1))
2774 #define power_timer1_disable() (PRR1 |= (uint8_t)(1 << PRT1))
2775
2776 #define power_timer2_enable() (PRR1 &= (uint8_t)~(1 << PRT2))
2777 #define power_timer2_disable() (PRR1 |= (uint8_t)(1 << PRT2))
2778
2779 #define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRT3))
2780 #define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRT3))
2781
2782 #define power_timer4_enable() (PRR1 &= (uint8_t)~(1 << PRT4))
2783 #define power_timer4_disable() (PRR1 |= (uint8_t)(1 << PRT4))
2784
2785 #define power_timer5_enable() (PRR1 &= (uint8_t)~(1 << PRT5))
2786 #define power_timer5_disable() (PRR1 |= (uint8_t)(1 << PRT5))
2787
2788 #define power_sequencer_state_machine_enable() (PRR2 &= (uint8_t)~(1 << PRSSM))
2789 #define power_sequencer_state_machine_disable() (PRR2 |= (uint8_t)(1 << PRSSM))
2790
2791 #define power_tx_modulator_enable() (PRR2 &= (uint8_t)~(1 << PRTM))
2792 #define power_tx_modulator_disable() (PRR2 |= (uint8_t)(1 << PRTM))
2793
2794 #define power_rssi_buffer_enable() (PRR2 &= (uint8_t)~(1 << PRRS))
2795 #define power_rssi_buffer_disable() (PRR2 |= (uint8_t)(1 << PRRS))
2796
2797 #define power_id_scan_enable() (PRR2 &= (uint8_t)~(1 << PRIDS))
2798 #define power_id_scan_disable() (PRR2 |= (uint8_t)(1 << PRIDS))
2799
2800 #define power_data_fifo_enable() (PRR2 &= (uint8_t)~(1 << PRDF))
2801 #define power_data_fifo_disable() (PRR2 |= (uint8_t)(1 << PRDF))
2802
2803 #define power_preamble_rssi_fifo_enable() (PRR2 &= (uint8_t)~(1 << PRSF))
2804 #define power_preamble_rssi_fifo_disable() (PRR2 |= (uint8_t)(1 << PRSF))
2805
2806 #define power_rx_buffer_A_enable() (PRR2 &= (uint8_t)~(1 << PRXA))
2807 #define power_rx_buffer_A_disable() (PRR2 |= (uint8_t)(1 << PRXA))
2808
2809 #define power_rx_buffer_B_enable() (PRR2 &= (uint8_t)~(1 << PRXB))
2810 #define power_rx_buffer_B_disable() (PRR2 |= (uint8_t)(1 << PRXB))
2811
2812 #define power_all_enable() \
2813 do{ \
2814 PRR0 &= (uint8_t)~((1 << PRCO) | (1 << PRVM) | (1 << PRCRC) | (1 << PRTXDC) | (1 << PRRXDC) | (1 << PRSPI)); \
2815 PRR1 &= (uint8_t)~((1 << PRT1) | (1 << PRT2) | (1 << PRT3) | (1 << PRT4) | (1 << PRT5)); \
2816 PRR2 &= (uint8_t)~((1 << PRSSM) | (1 << PRTM) | (1 << PRRS) | (1 << PRIDS) | (1 << PRDF) | (1 << PRSF) | (1 << PRXA) | (1 << PRXB)); \
2817 }while(0)
2818
2819 #define power_all_disable() \
2820 do{ \
2821 PRR0 |= (uint8_t)((1 << PRCO) | (1 << PRVM) | (1 << PRCRC) | (1 << PRTXDC) | (1 << PRRXDC) | (1 << PRSPI)); \
2822 PRR1 |= (uint8_t)((1 << PRT1) | (1 << PRT2) | (1 << PRT3) | (1 << PRT4) | (1 << PRT5)); \
2823 PRR2 |= (uint8_t)((1 << PRSSM) | (1 << PRTM) | (1 << PRRS) | (1 << PRIDS) | (1 << PRDF) | (1 << PRSF) | (1 << PRXA) | (1 << PRXB)); \
2824 }while(0)
2825
2826 #elif defined(__AVR_ATmega64HVE__)
2827
2828
2829 #define power_lin_enable() (PRR0 &= (uint8_t)~(1 << PRLIN))
2830 #define power_lin_disable() (PRR0 |= (uint8_t)(1 << PRLIN))
2831
2832 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
2833 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
2834
2835 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
2836 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
2837
2838 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
2839 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
2840
2841 #define power_all_enable() (PRR0 &= (uint8_t)~((1<<PRLIN)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRSPI)))
2842 #define power_all_disable() (PRR0 |= (uint8_t)((1<<PRLIN)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRSPI)))
2843
2844 #elif defined(__AVR_ATmega16M1__) \
2845 || defined(__AVR_ATmega32C1__) \
2846 || defined(__AVR_ATmega32M1__) \
2847 || defined(__AVR_ATmega64C1__) \
2848 || defined(__AVR_ATmega64M1__)
2849
2850 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
2851 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
2852
2853 #define power_lin_enable() (PRR &= (uint8_t)~(1 << PRLIN))
2854 #define power_lin_disable() (PRR |= (uint8_t)(1 << PRLIN))
2855
2856 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
2857 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
2858
2859 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
2860 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
2861
2862 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
2863 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
2864
2865 #define power_psc_enable() (PRR &= (uint8_t)~(1 << PRPSC))
2866 #define power_psc_disable() (PRR |= (uint8_t)(1 << PRPSC))
2867
2868 #define power_can_enable() (PRR &= (uint8_t)~(1 << PRCAN))
2869 #define power_can_disable() (PRR |= (uint8_t)(1 << PRCAN))
2870
2871 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRLIN)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC)|(1<<PRCAN)))
2872 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRLIN)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC)|(1<<PRCAN)))
2873
2874
2875 #elif defined(__AVR_ATtiny167__) \
2876 || defined(__AVR_ATtiny87__) \
2877 || defined(__AVR_ATA5505__) \
2878 || defined(__AVR_ATA5272__)
2879
2880 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
2881 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
2882
2883 #define power_usi_enable() (PRR &= (uint8_t)~(1 << PRUSI))
2884 #define power_usi_disable() (PRR |= (uint8_t)(1 << PRUSI))
2885
2886 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
2887 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
2888
2889 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
2890 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
2891
2892 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
2893 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
2894
2895 #define power_lin_enable() (PRR &= (uint8_t)~(1 << PRLIN))
2896 #define power_lin_disable() (PRR |= (uint8_t)(1 << PRLIN))
2897
2898 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRUSI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRSPI)|(1<<PRLIN)))
2899 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRUSI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRSPI)|(1<<PRLIN)))
2900
2901
2902 #elif defined(__AVR_ATtiny1634__)
2903
2904 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
2905 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
2906
2907 #define power_usart0_enable() (PRR &= (uint8_t)~(1 << PRUSART0))
2908 #define power_usart0_disable() (PRR |= (uint8_t)(1 << PRUSART0))
2909
2910 #define power_usart1_enable() (PRR &= (uint8_t)~(1 << PRUSART1))
2911 #define power_usart1_disable() (PRR |= (uint8_t)(1 << PRUSART1))
2912
2913 #define power_usi_enable() (PRR &= (uint8_t)~(1 << PRUSI))
2914 #define power_usi_disable() (PRR |= (uint8_t)(1 << PRUSI))
2915
2916 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
2917 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
2918
2919 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
2920 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
2921
2922 #define power_twi_enable() (PRR &= (uint8_t)~(1 << PRTWI))
2923 #define power_twi_disable() (PRR |= (uint8_t)(1 << PRTWI))
2924
2925 #define power_all_enable() (PRR &= (uint8_t)~((1 << PRTWI)|(1 << PRUSI)|(1 << PRTIM0)|(1 << PRTIM1)|(1 << PRUSART0)|(1 << PRUSART1)|(1 << PRADC)))
2926 #define power_all_disable() (PRR |= (uint8_t)((1 << PRTWI)|(1 << PRUSI)|(1 << PRTIM0)|(1 << PRTIM1)|(1 << PRUSART0)|(1 << PRUSART1)|(1 << PRADC)))
2927
2928
2929 #elif defined(__AVR_AT90USB82__) \
2930 || defined(__AVR_AT90USB162__) \
2931 || defined(__AVR_ATmega8U2__) \
2932 || defined(__AVR_ATmega16U2__) \
2933 || defined(__AVR_ATmega32U2__)
2934
2935 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
2936 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
2937
2938 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
2939 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
2940
2941 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
2942 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
2943
2944 #define power_usb_enable() (PRR1 &= (uint8_t)~(1 << PRUSB))
2945 #define power_usb_disable() (PRR1 |= (uint8_t)(1 << PRUSB))
2946
2947 #define power_usart1_enable() (PRR1 &= (uint8_t)~(1 << PRUSART1))
2948 #define power_usart1_disable() (PRR1 |= (uint8_t)(1 << PRUSART1))
2949
2950 #define power_all_enable() \
2951 do{ \
2952 PRR0 &= (uint8_t)~((1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)); \
2953 PRR1 &= (uint8_t)~((1<<PRUSB)|(1<<PRUSART1)); \
2954 }while(0)
2955
2956 #define power_all_disable() \
2957 do{ \
2958 PRR0 |= (uint8_t)((1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)); \
2959 PRR1 |= (uint8_t)((1<<PRUSB)|(1<<PRUSART1)); \
2960 }while(0)
2961
2962
2963 #elif defined(__AVR_AT90SCR100__)
2964
2965 #define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
2966 #define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
2967
2968 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
2969 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
2970
2971 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
2972 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
2973
2974 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
2975 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
2976
2977 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
2978 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
2979
2980 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
2981 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
2982
2983 #define power_usbh_enable() (PRR1 &= (uint8_t)~(1 << PRUSBH))
2984 #define power_usbh_disable() (PRR1 |= (uint8_t)(1 << PRUSBH))
2985
2986 #define power_usb_enable() (PRR1 &= (uint8_t)~(1 << PRUSB))
2987 #define power_usb_disable() (PRR1 |= (uint8_t)(1 << PRUSB))
2988
2989 #define power_hsspi_enable() (PRR1 &= (uint8_t)~(1 << PRHSSPI))
2990 #define power_hsspi_disable() (PRR1 |= (uint8_t)(1 << PRHSSPI))
2991
2992 #define power_sci_enable() (PRR1 &= (uint8_t)~(1 << PRSCI))
2993 #define power_sci_disable() (PRR1 |= (uint8_t)(1 << PRSCI))
2994
2995 #define power_aes_enable() (PRR1 &= (uint8_t)~(1 << PRAES))
2996 #define power_aes_disable() (PRR1 |= (uint8_t)(1 << PRAES))
2997
2998 #define power_kb_enable() (PRR1 &= (uint8_t)~(1 << PRKB))
2999 #define power_kb_disable() (PRR1 |= (uint8_t)(1 << PRKB))
3000
3001 #define power_all_enable() \
3002 do{ \
3003 PRR0 &= (uint8_t)~((1<<PRUSART0)|(1<<PRSPI)|(1<<PRTIM1)|(1<<PRTIM0)|(1<<PRTIM2)|(1<<PRTWI)); \
3004 PRR1 &= (uint8_t)~((1<<PRUSBH)|(1<<PRUSB)|(1<<PRHSSPI)|(1<<PRSCI)|(1<<PRAES)|(1<<PRKB)); \
3005 }while(0)
3006
3007 #define power_all_disable() \
3008 do{ \
3009 PRR0 |= (uint8_t)((1<<PRUSART0)|(1<<PRSPI)|(1<<PRTIM1)|(1<<PRTIM0)|(1<<PRTIM2)|(1<<PRTWI)); \
3010 PRR1 |= (uint8_t)((1<<PRUSBH)|(1<<PRUSB)|(1<<PRHSSPI)|(1<<PRSCI)|(1<<PRAES)|(1<<PRKB)); \
3011 }while(0)
3012
3013
3014 #elif defined(__AVR_ATtiny4__) \
3015 || defined(__AVR_ATtiny5__) \
3016 || defined(__AVR_ATtiny9__) \
3017 || defined(__AVR_ATtiny10__) \
3018 || defined(__AVR_ATtiny13A__) \
3019
3020 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
3021 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
3022
3023 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
3024 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
3025
3026 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRTIM0)))
3027 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRTIM0)))
3028
3029
3030 #elif defined(__AVR_ATtiny20__) \
3031 || defined(__AVR_ATtiny40__)
3032
3033 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
3034 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
3035
3036 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
3037 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
3038
3039 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
3040 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
3041
3042 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
3043 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
3044
3045 #define power_twi_enable() (PRR &= (uint8_t)~(1 << PRTWI))
3046 #define power_twi_disable() (PRR |= (uint8_t)(1 << PRTWI))
3047
3048 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRSPI)|(1<<PRTWI)))
3049 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRSPI)|(1<<PRTWI)))
3050
3051 #endif
3052
3053
3054 #if defined(__AVR_AT90CAN32__) \
3055 || defined(__AVR_AT90CAN64__) \
3056 || defined(__AVR_AT90CAN128__) \
3057 || defined(__AVR_AT90PWM1__) \
3058 || defined(__AVR_AT90PWM2__) \
3059 || defined(__AVR_AT90PWM2B__) \
3060 || defined(__AVR_AT90PWM3__) \
3061 || defined(__AVR_AT90PWM3B__) \
3062 || defined(__AVR_AT90PWM81__) \
3063 || defined(__AVR_AT90PWM161__) \
3064 || defined(__AVR_AT90PWM216__) \
3065 || defined(__AVR_AT90PWM316__) \
3066 || defined(__AVR_AT90SCR100__) \
3067 || defined(__AVR_AT90USB646__) \
3068 || defined(__AVR_AT90USB647__) \
3069 || defined(__AVR_AT90USB82__) \
3070 || defined(__AVR_AT90USB1286__) \
3071 || defined(__AVR_AT90USB1287__) \
3072 || defined(__AVR_AT90USB162__) \
3073 || defined(__AVR_ATA5505__) \
3074 || defined(__AVR_ATA5272__) \
3075 || defined(__AVR_ATmega1280__) \
3076 || defined(__AVR_ATmega1281__) \
3077 || defined(__AVR_ATmega1284__) \
3078 || defined(__AVR_ATmega128RFA1__) \
3079 || defined(__AVR_ATmega128RFA2__) \
3080 || defined(__AVR_ATmega128RFR2__) \
3081 || defined(__AVR_ATmega1284P__) \
3082 || defined(__AVR_ATmega162__) \
3083 || defined(__AVR_ATmega164A__) \
3084 || defined(__AVR_ATmega164P__) \
3085 || defined(__AVR_ATmega164PA__) \
3086 || defined(__AVR_ATmega165__) \
3087 || defined(__AVR_ATmega165A__) \
3088 || defined(__AVR_ATmega165P__) \
3089 || defined(__AVR_ATmega165PA__) \
3090 || defined(__AVR_ATmega168__) \
3091 || defined(__AVR_ATmega168A__) \
3092 || defined(__AVR_ATmega168P__) \
3093 || defined(__AVR_ATmega168PA__) \
3094 || defined(__AVR_ATmega169__) \
3095 || defined(__AVR_ATmega169A__) \
3096 || defined(__AVR_ATmega169P__) \
3097 || defined(__AVR_ATmega169PA__) \
3098 || defined(__AVR_ATmega16M1__) \
3099 || defined(__AVR_ATmega16U2__) \
3100 || defined(__AVR_ATmega324PA__) \
3101 || defined(__AVR_ATmega16U4__) \
3102 || defined(__AVR_ATmega2560__) \
3103 || defined(__AVR_ATmega2561__) \
3104 || defined(__AVR_ATmega256RFA2__) \
3105 || defined(__AVR_ATmega256RFR2__) \
3106 || defined(__AVR_ATmega324A__) \
3107 || defined(__AVR_ATmega324P__) \
3108 || defined(__AVR_ATmega325__) \
3109 || defined(__AVR_ATmega325A__) \
3110 || defined(__AVR_ATmega325P__) \
3111 || defined(__AVR_ATmega325PA__) \
3112 || defined(__AVR_ATmega3250__) \
3113 || defined(__AVR_ATmega3250A__) \
3114 || defined(__AVR_ATmega3250P__) \
3115 || defined(__AVR_ATmega3250PA__) \
3116 || defined(__AVR_ATmega328__) \
3117 || defined(__AVR_ATmega328P__) \
3118 || defined(__AVR_ATmega329__) \
3119 || defined(__AVR_ATmega329A__) \
3120 || defined(__AVR_ATmega329P__) \
3121 || defined(__AVR_ATmega329PA__) \
3122 || defined(__AVR_ATmega3290__) \
3123 || defined(__AVR_ATmega3290A__) \
3124 || defined(__AVR_ATmega3290P__) \
3125 || defined(__AVR_ATmega3290PA__) \
3126 || defined(__AVR_ATmega32C1__) \
3127 || defined(__AVR_ATmega32M1__) \
3128 || defined(__AVR_ATmega32U2__) \
3129 || defined(__AVR_ATmega32U4__) \
3130 || defined(__AVR_ATmega32U6__) \
3131 || defined(__AVR_ATmega48__) \
3132 || defined(__AVR_ATmega48A__) \
3133 || defined(__AVR_ATmega48PA__) \
3134 || defined(__AVR_ATmega48P__) \
3135 || defined(__AVR_ATmega640__) \
3136 || defined(__AVR_ATmega649P__) \
3137 || defined(__AVR_ATmega644__) \
3138 || defined(__AVR_ATmega644A__) \
3139 || defined(__AVR_ATmega644P__) \
3140 || defined(__AVR_ATmega644PA__) \
3141 || defined(__AVR_ATmega645__) \
3142 || defined(__AVR_ATmega645A__) \
3143 || defined(__AVR_ATmega645P__) \
3144 || defined(__AVR_ATmega6450__) \
3145 || defined(__AVR_ATmega6450A__) \
3146 || defined(__AVR_ATmega6450P__) \
3147 || defined(__AVR_ATmega649__) \
3148 || defined(__AVR_ATmega649A__) \
3149 || defined(__AVR_ATmega64M1__) \
3150 || defined(__AVR_ATmega64C1__) \
3151 || defined(__AVR_ATmega88A__) \
3152 || defined(__AVR_ATmega88PA__) \
3153 || defined(__AVR_ATmega6490__) \
3154 || defined(__AVR_ATmega6490A__) \
3155 || defined(__AVR_ATmega6490P__) \
3156 || defined(__AVR_ATmega64RFA2__) \
3157 || defined(__AVR_ATmega64RFR2__) \
3158 || defined(__AVR_ATmega88__) \
3159 || defined(__AVR_ATmega88P__) \
3160 || defined(__AVR_ATmega8U2__) \
3161 || defined(__AVR_ATmega16U2__) \
3162 || defined(__AVR_ATmega32U2__) \
3163 || defined(__AVR_ATtiny48__) \
3164 || defined(__AVR_ATtiny88__) \
3165 || defined(__AVR_ATtiny87__) \
3166 || defined(__AVR_ATtiny167__) \
3167 || defined(__DOXYGEN__)
3168
3169
3170 /** \addtogroup avr_power
3171
3172 Some of the newer AVRs contain a System Clock Prescale Register (CLKPR) that
3173 allows you to decrease the system clock frequency and the power consumption
3174 when the need for processing power is low. Below are two macros and an
3175 enumerated type that can be used to interface to the Clock Prescale Register.
3176
3177 \note Not all AVR devices have a Clock Prescale Register. On those devices
3178 without a Clock Prescale Register, these macros are not available.
3179 */
3180
3181
3182 /** \addtogroup avr_power
3183 \code
3184 typedef enum
3185 {
3186 clock_div_1 = 0,
3187 clock_div_2 = 1,
3188 clock_div_4 = 2,
3189 clock_div_8 = 3,
3190 clock_div_16 = 4,
3191 clock_div_32 = 5,
3192 clock_div_64 = 6,
3193 clock_div_128 = 7,
3194 clock_div_256 = 8,
3195 clock_div_1_rc = 15, // ATmega128RFA1 only
3196 } clock_div_t;
3197 \endcode
3198 Clock prescaler setting enumerations.
3199
3200 */
3201 typedef enum
3202 {
3203 clock_div_1 = 0,
3204 clock_div_2 = 1,
3205 clock_div_4 = 2,
3206 clock_div_8 = 3,
3207 clock_div_16 = 4,
3208 clock_div_32 = 5,
3209 clock_div_64 = 6,
3210 clock_div_128 = 7,
3211 clock_div_256 = 8
3212 #if defined(__AVR_ATmega128RFA1__) \
3213 || defined(__AVR_ATmega256RFA2__) \
3214 || defined(__AVR_ATmega128RFA2__) \
3215 || defined(__AVR_ATmega64RFA2__) \
3216 || defined(__AVR_ATmega256RFR2__) \
3217 || defined(__AVR_ATmega128RFR2__) \
3218 || defined(__AVR_ATmega64RFR2__)
3219 , clock_div_1_rc = 15
3220 #endif
3221 } clock_div_t;
3222
3223
3224 static __inline__ void clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
3225
3226 /** \addtogroup avr_power
3227 \code clock_prescale_set(x) \endcode
3228
3229 Set the clock prescaler register select bits, selecting a system clock
3230 division setting. This function is inlined, even if compiler
3231 optimizations are disabled.
3232
3233 The type of x is clock_div_t.
3234 */
3235 void clock_prescale_set(clock_div_t __x)
3236 {
3237 uint8_t __tmp = _BV(CLKPCE);
3238 __asm__ __volatile__ (
3239 "in __tmp_reg__,__SREG__" "\n\t"
3240 "cli" "\n\t"
3241 "sts %1, %0" "\n\t"
3242 "sts %1, %2" "\n\t"
3243 "out __SREG__, __tmp_reg__"
3244 : /* no outputs */
3245 : "d" (__tmp),
3246 "M" (_SFR_MEM_ADDR(CLKPR)),
3247 "d" (__x)
3248 : "r0");
3249 }
3250
3251 /** \addtogroup avr_power
3252 \code clock_prescale_get() \endcode
3253 Gets and returns the clock prescaler register setting. The return type is clock_div_t.
3254
3255 */
3256 #define clock_prescale_get() (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)|(1<<CLKPS3)))
3257
3258 #elif defined(__AVR_ATmega48HVF__) \
3259 || defined(__AVR_ATmega26HVG__) \
3260 || defined(__AVR_ATmega16HVB__) \
3261 || defined(__AVR_ATmega16HVBREVB__) \
3262 || defined(__AVR_ATmega64HVE__) \
3263 || defined(__AVR_ATmega32HVB__) \
3264 || defined(__AVR_ATmega32HVBREVB__)
3265
3266 typedef enum
3267 {
3268 clock_div_1 = 0,
3269 clock_div_2 = 1,
3270 clock_div_4 = 2,
3271 clock_div_8 = 3
3272 } clock_div_t;
3273
3274 static __inline__ void clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
3275
3276 void clock_prescale_set(clock_div_t __x)
3277 {
3278 uint8_t __tmp = _BV(CLKPCE);
3279 __asm__ __volatile__ (
3280 "in __tmp_reg__,__SREG__" "\n\t"
3281 "cli" "\n\t"
3282 "sts %1, %0" "\n\t"
3283 "sts %1, %2" "\n\t"
3284 "out __SREG__, __tmp_reg__"
3285 : /* no outputs */
3286 : "d" (__tmp),
3287 "M" (_SFR_MEM_ADDR(CLKPR)),
3288 "d" (__x)
3289 : "r0");
3290 }
3291
3292 #define clock_prescale_get() (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)))
3293
3294 #elif defined(__AVR_ATA5790__) \
3295 || defined (__AVR_ATA5790N__) \
3296 || defined (__AVR_ATA5795__)
3297
3298 typedef enum
3299 {
3300 clock_div_1 = 0,
3301 clock_div_2 = 1,
3302 clock_div_4 = 2,
3303 clock_div_8 = 3,
3304 clock_div_16 = 4,
3305 clock_div_32 = 5,
3306 clock_div_64 = 6,
3307 clock_div_128 = 7,
3308 } clock_div_t;
3309
3310 static __inline__ void system_clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
3311
3312 void system_clock_prescale_set(clock_div_t __x)
3313 {
3314 uint8_t __tmp = _BV(CLKPCE);
3315 __asm__ __volatile__ (
3316 "in __tmp_reg__,__SREG__" "\n\t"
3317 "cli" "\n\t"
3318 "out %1, %0" "\n\t"
3319 "out %1, %2" "\n\t"
3320 "out __SREG__, __tmp_reg__"
3321 : /* no outputs */
3322 : "d" (__tmp),
3323 "I" (_SFR_IO_ADDR(CLKPR)),
3324 "d" (__x)
3325 : "r0");
3326 }
3327
3328 #define system_clock_prescale_get() (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)))
3329
3330 typedef enum
3331 {
3332 timer_clock_div_reset = 0,
3333 timer_clock_div_1 = 1,
3334 timer_clock_div_2 = 2,
3335 timer_clock_div_4 = 3,
3336 timer_clock_div_8 = 4,
3337 timer_clock_div_16 = 5,
3338 timer_clock_div_32 = 6,
3339 timer_clock_div_64 = 7
3340 } timer_clock_div_t;
3341
3342 static __inline__ void timer_clock_prescale_set(timer_clock_div_t) __attribute__((__always_inline__));
3343
3344 void timer_clock_prescale_set(timer_clock_div_t __x)
3345 {
3346 uint8_t __t;
3347 __asm__ __volatile__ (
3348 "in __tmp_reg__,__SREG__" "\n\t"
3349 "cli" "\n\t"
3350 "in %[temp],%[clkpr]" "\n\t"
3351 "out %[clkpr],%[enable]" "\n\t"
3352 "andi %[temp],%[not_CLTPS]" "\n\t"
3353 "or %[temp], %[set_value]" "\n\t"
3354 "out %[clkpr],%[temp]" "\n\t"
3355 "sei" "\n\t"
3356 "out __SREG__,__tmp_reg__" "\n\t"
3357 : /* no outputs */
3358 : [temp] "r" (__t),
3359 [clkpr] "I" (_SFR_IO_ADDR(CLKPR)),
3360 [enable] "r" (_BV(CLKPCE)),
3361 [not_CLTPS] "M" (0xFF & (~ ((1 << CLTPS2) | (1 << CLTPS1) | (1 << CLTPS0)))),
3362 [set_value] "r" ((__x & 7) << 3)
3363 : "r0");
3364 }
3365
3366 #define timer_clock_prescale_get() (timer_clock_div_t)(CLKPR & (uint8_t)((1<<CLTPS0)|(1<<CLTPS1)|(1<<CLTPS2)))
3367
3368 #elif defined(__AVR_ATA5831__)
3369
3370 typedef enum
3371 {
3372 clock_div_1 = 0,
3373 clock_div_2 = 1,
3374 clock_div_4 = 2,
3375 clock_div_8 = 3,
3376 clock_div_16 = 4,
3377 clock_div_32 = 5,
3378 clock_div_64 = 6,
3379 clock_div_128 = 7
3380 } clock_div_t;
3381
3382 static __inline__ void system_clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
3383
3384 void system_clock_prescale_set(clock_div_t __x)
3385 {
3386 uint8_t __t;
3387 __asm__ __volatile__ (
3388 "in __tmp_reg__,__SREG__" "\n\t"
3389 "cli" "\n\t"
3390 "in %[temp],%[clpr]" "\n\t"
3391 "out %[clpr],%[enable]" "\n\t"
3392 "andi %[temp],%[not_CLKPS]" "\n\t"
3393 "or %[temp], %[set_value]" "\n\t"
3394 "out %[clpr],%[temp]" "\n\t"
3395 "sei" "\n\t"
3396 "out __SREG__,__tmp_reg__" "\n\t"
3397 : /* no outputs */
3398 : [temp] "r" (__t),
3399 [clpr] "I" (_SFR_IO_ADDR(CLPR)),
3400 [enable] "r" _BV(CLPCE),
3401 [not_CLKPS] "M" (0xFF & (~ ((1 << CLKPS2) | (1 << CLKPS1) | (1 << CLKPS0)))),
3402 [set_value] "r" (__x & 7)
3403 : "r0");
3404 }
3405
3406 #define system_clock_prescale_get() (clock_div_t)(CLPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)))
3407
3408 typedef enum
3409 {
3410 timer_clock_div_reset = 0,
3411 timer_clock_div_1 = 1,
3412 timer_clock_div_2 = 2,
3413 timer_clock_div_4 = 3,
3414 timer_clock_div_8 = 4,
3415 timer_clock_div_16 = 5,
3416 timer_clock_div_32 = 6,
3417 timer_clock_div_64 = 7
3418 } timer_clock_div_t;
3419
3420 static __inline__ void timer_clock_prescale_set(timer_clock_div_t) __attribute__((__always_inline__));
3421
3422 void timer_clock_prescale_set(timer_clock_div_t __x)
3423 {
3424 uint8_t __t;
3425 __asm__ __volatile__ (
3426 "in __tmp_reg__,__SREG__" "\n\t"
3427 "cli" "\n\t"
3428 "in %[temp],%[clpr]" "\n\t"
3429 "out %[clpr],%[enable]" "\n\t"
3430 "andi %[temp],%[not_CLTPS]" "\n\t"
3431 "or %[temp], %[set_value]" "\n\t"
3432 "out %[clpr],%[temp]" "\n\t"
3433 "sei" "\n\t"
3434 "out __SREG__,__tmp_reg__" "\n\t"
3435 : /* no outputs */
3436 : [temp] "r" (__t),
3437 [clpr] "I" (_SFR_IO_ADDR(CLPR)),
3438 [enable] "r" (_BV(CLPCE)),
3439 [not_CLTPS] "M" (0xFF & (~ ((1 << CLTPS2) | (1 << CLTPS1) | (1 << CLTPS0)))),
3440 [set_value] "r" ((__x & 7) << 3)
3441 : "r0");
3442 }
3443
3444 #define timer_clock_prescale_get() (timer_clock_div_t)(CLPR & (uint8_t)((1<<CLTPS0)|(1<<CLTPS1)|(1<<CLTPS2)))
3445
3446 #elif defined(__AVR_ATtiny24__) \
3447 || defined(__AVR_ATtiny24A__) \
3448 || defined(__AVR_ATtiny44__) \
3449 || defined(__AVR_ATtiny44A__) \
3450 || defined(__AVR_ATtiny84__) \
3451 || defined(__AVR_ATtiny84A__) \
3452 || defined(__AVR_ATtiny25__) \
3453 || defined(__AVR_ATtiny45__) \
3454 || defined(__AVR_ATtiny85__) \
3455 || defined(__AVR_ATtiny261A__) \
3456 || defined(__AVR_ATtiny261__) \
3457 || defined(__AVR_ATtiny461__) \
3458 || defined(__AVR_ATtiny461A__) \
3459 || defined(__AVR_ATtiny861__) \
3460 || defined(__AVR_ATtiny861A__) \
3461 || defined(__AVR_ATtiny2313__) \
3462 || defined(__AVR_ATtiny2313A__) \
3463 || defined(__AVR_ATtiny4313__) \
3464 || defined(__AVR_ATtiny13__) \
3465 || defined(__AVR_ATtiny13A__) \
3466 || defined(__AVR_ATtiny43U__) \
3467
3468 typedef enum
3469 {
3470 clock_div_1 = 0,
3471 clock_div_2 = 1,
3472 clock_div_4 = 2,
3473 clock_div_8 = 3,
3474 clock_div_16 = 4,
3475 clock_div_32 = 5,
3476 clock_div_64 = 6,
3477 clock_div_128 = 7,
3478 clock_div_256 = 8
3479 } clock_div_t;
3480
3481 static __inline__ void clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
3482
3483 void clock_prescale_set(clock_div_t __x)
3484 {
3485 uint8_t __tmp = _BV(CLKPCE);
3486 __asm__ __volatile__ (
3487 "in __tmp_reg__,__SREG__" "\n\t"
3488 "cli" "\n\t"
3489 "out %1, %0" "\n\t"
3490 "out %1, %2" "\n\t"
3491 "out __SREG__, __tmp_reg__"
3492 : /* no outputs */
3493 : "d" (__tmp),
3494 "I" (_SFR_IO_ADDR(CLKPR)),
3495 "d" (__x)
3496 : "r0");
3497 }
3498
3499
3500 #define clock_prescale_get() (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)|(1<<CLKPS3)))
3501
3502 #elif defined(__AVR_ATtiny841__)
3503
3504 typedef enum
3505 {
3506 clock_div_1 = 0,
3507 clock_div_2 = 1,
3508 clock_div_4 = 2,
3509 clock_div_8 = 3,
3510 clock_div_16 = 4,
3511 clock_div_32 = 5,
3512 clock_div_64 = 6,
3513 clock_div_128 = 7,
3514 clock_div_256 = 8
3515 } clock_div_t;
3516
3517 static __inline__ void clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
3518
3519 void clock_prescale_set(clock_div_t __x)
3520 {
3521
3522 __asm__ __volatile__ (
3523 "in __tmp_reg__,__SREG__" "\n\t"
3524 "cli" "\n\t"
3525 "sts %2, %3" "\n\t"
3526 "sts %1, %0" "\n\t"
3527 "out __SREG__, __tmp_reg__"
3528 : /* no outputs */
3529 : "d" (__x),
3530 "M" (_SFR_MEM_ADDR(CLKPR)),
3531 "M" (_SFR_MEM_ADDR(CCP)),
3532 "r" ((uint8_t)0xD8)
3533 : "r0");
3534 }
3535
3536
3537 #define clock_prescale_get() (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)|(1<<CLKPS3)))
3538
3539 #elif defined(__AVR_ATtiny4__) \
3540 || defined(__AVR_ATtiny5__) \
3541 || defined(__AVR_ATtiny9__) \
3542 || defined(__AVR_ATtiny10__) \
3543 || defined(__AVR_ATtiny20__) \
3544 || defined(__AVR_ATtiny40__) \
3545
3546 typedef enum
3547 {
3548 clock_div_1 = 0,
3549 clock_div_2 = 1,
3550 clock_div_4 = 2,
3551 clock_div_8 = 3,
3552 clock_div_16 = 4,
3553 clock_div_32 = 5,
3554 clock_div_64 = 6,
3555 clock_div_128 = 7,
3556 clock_div_256 = 8
3557 } clock_div_t;
3558
3559 static __inline__ void clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
3560
3561 void clock_prescale_set(clock_div_t __x)
3562 {
3563 uint8_t __tmp = 0xD8;
3564 __asm__ __volatile__ (
3565 "in __tmp_reg__,__SREG__" "\n\t"
3566 "cli" "\n\t"
3567 "out %1, %0" "\n\t"
3568 "out %2, %3" "\n\t"
3569 "out __SREG__, __tmp_reg__"
3570 : /* no outputs */
3571 : "d" (__tmp),
3572 "I" (_SFR_IO_ADDR(CCP)),
3573 "I" (_SFR_IO_ADDR(CLKPSR)),
3574 "d" (__x)
3575 : "r16");
3576 }
3577
3578 #define clock_prescale_get() (clock_div_t)(CLKPSR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)|(1<<CLKPS3)))
3579
3580 #endif
3581
3582 #endif /* _AVR_POWER_H_ */

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