SPICE OPUS
Author: Faculty of Electircal Engineering, Ljubljana, Slovenia / Template design: G. Wolfgang
Description: SPICE OPUS -- A SPICE engine for OPtimization UtilitieS
Keywords: analog circuit simulation, spice, opus, analog circuit optimization

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THE SLIDE RULE OF SILICON DESIGN

Free Analog Circuit Simulation

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Selected Research Papers on SPICE OPUS

Conferences

1. PUHAN, Janez, TUMA, Tadej, FAJFAR, Iztok. New optimising feature in SPICE. V: Zbornik osme ERK '99, 23. - 25. september 1999, Portorož, Slovenija. Ljubljana, 1999, zv. A, str. 47-50, ilustr. [COBISS-ID 1799252]
2. BÜRMEN, Arpad, PUHAN, Janez, TUMA, Tadej, FAJFAR, Iztok, BRATKOVIÈ, Franc. Improved genetic algorithm in SPICE OPUS for model parameter extraction. ERK 2000, Portorož, Slovenija., zv. A, str. 69-72, graf. prikazi. [COBISS-ID 2013012]
3. BÜRMEN, Arpad, PUHAN, Janez, TUMA, Tadej, FAJFAR, Iztok, NUSSDORFER, Andrej. Parallel simplex algorithm for circuit optimisation. ERK 2001, Portorož, Slovenija, zv. A, str. 37-40. [COBISS-ID 2403156]
4. BÜRMEN, Arpad, PUHAN, Janez, FAJFAR, Iztok, NUSSDORFER, Andrej, TUMA, Tadej. Simulating asynchronous parallel circuit optimization algorithms. V: Zbornik ERK 2002, Portorož, Slovenija., zv. A, str. 41-44. [COBISS.SI-ID 3420244]
5. PUHAN, Janez, TUMA, Tadej. Optimisation of analog circuits with SPICE 3F4. V: Proceedings of the 1997 ECCTD, Budapest, Hungary, 30th August - 3rd September, 1997: ECCTD ´97. , str. 2/177-180, ilustr. [COBISS-ID 459348]
6. PUHAN, Janez, TUMA, Tadej, FAJFAR, Iztok. Optimisation methods in SPICE: a comparison. V: ECCTD '99 : proceedings ECCTD, 29 August - 2 September 1999, Stresa - Italy. 1999, vol. 2, str. 1279-1282, graf. prikazi. [COBISS-ID 1571668]
7. BÜRMEN, Arpad, PUHAN, Janez, TUMA, Tadej, FAJFAR, Iztok, NUSSDORFER, Andrej. Model parameter identification with SPICE OPUS : a comparison of direct search and elitistic genetic algorithm. ECCTD'01, Helsinki, 2001., str. III-61-III-64. [COBISS-ID 2352468]
8. BÜRMEN, Arpad, PUHAN, Janez, TUMA, Tadej. Defining cost functions for robust IC design and optimization. V: SCIUTO, Donatella (ur.), VERKEST, Diederik (ur.). Designers' forum : Design, Automation and Test in Europe Conference and Exhibition, Munich, Germany, March 3-7, 2003,: IEEE Computer Society, cop. 2003, str. 196-201. [COBISS.SI-ID 4026452]
9. BÜRMEN, Arpad, PUHAN, Janez, TUMA, Tadej. Robust design and optimization of operating amplifiers. V: International conference on industrial technology [also] IEEE ICIT 2003, Hotel Habakuk Maribor, Slovenia, December 10-12, 2003. Proceedings. Piscataway: IEEE, 2003, str. 745-750. [COBISS.SI-ID 4025940]
10. BÜRMEN, Arpad, FAJFAR, Iztok, TUMA, Tadej. Combined simplex-trust-region optimization algorithm for automated IC design. V: ECCTD, 2007, Seville, Spain. IEEE, str. 543-546, ilustr. [COBISS.SI-ID 6094164]
11. CIJAN, Gregor, TUMA, Tadej, BÜRMEN, Arpad. Modeling and simulation of MOS transistor mismatch. V: 6th EUROSIM, Ljubljana, Slovenia, 2007. Vol. 2, cop. 2007, str. 1-8, ilustr. [COBISS.SI-ID 6092628]
12. OLENŠEK, Jernej, BÜRMEN, Arpad, PUHAN, Janez, TUMA, Tadej. Simulated annealing for sizing of integrated circuits in SPICE. V: 6th EUROSIM, Ljubljana, Slovenia, 2007. Vol. 2, str. 1-8, ilustr. [COBISS.SI-ID 6092372]
13. OLENŠEK, Jernej, BÜRMEN, Arpad, PUHAN, Janez, TUMA, Tadej. A new optimization algorithm for the design of integrated circuits. V: Eurocon 2007: IEEE Service Center, str. 674-680, ilustr. [COBISS.SI-ID 6093652]

Journals

1. TUMA, Tadej, BRATKOVIÈ, Franc. A general approach to circuit equations. Int. j. circuit theory appl., 1994, vol. 22, no. 6, str. 431-445. [COBISS-ID 425044]
2. TUMA, Tadej. Some application notes on reduction operators. Int. j. circuit theory appl., 1997, vol. 25, no. 2, str. 141-145. [COBISS-ID 395348]
3. BÜRMEN, Arpad, STRLE, Drago, BRATKOVIÈ, Franc, PUHAN, Janez, FAJFAR, Iztok, TUMA, Tadej. Penalty function approach to robust analog IC design. Inf. MIDEM, 2002, letn. 32, št. 3, str. 149-156, graf. prikazi. [COBISS.SI-ID 3371348]
4. BÜRMEN, Arpad, STRLE, Drago, BRATKOVIÈ, Franc, PUHAN, Janez, FAJFAR, Iztok, TUMA, Tadej. Automated robust design and optimization of integrated circuits by means of penalty functions. AEÜ, Int. j. electron. commun. (Print). [Print ed.], 2003, 57, no. 1, str. 47-56, ilustr. [COBISS.SI-ID 3415892]
5. PUHAN, Janez, BÜRMEN, Arpad, TUMA, Tadej. Analogue integrated circuit sizing with several optimization runs using heuristics for setting initial points. Can. j. electr. comput. eng., 2003, vol. 28, no. 3/4, str. 105-111. [COBISS.SI-ID 4110420]
6. PUHAN, Janez, BÜRMEN, Arpad, TUMA, Tadej. Heuristic approach to circuit sizing problem. Inf. MIDEM, 2003, letn. 33, št. 3, str. 149-156. [COBISS.SI-ID 4110676]
7. PUHAN, Janez, TUMA, Tadej, FAJFAR, Iztok. SPICE for Windows 95/98/NT. Elektroteh. vestn., 1998, let. 65, št. 5, str. 267-271, graf. prikazi. [COBISS-ID 1202004]
8. PUHAN, Janez, FAJFAR, Iztok, TUMA, Tadej, BÜRMEN, Arpad. Integration of generic optimisation algorithms in SPICE. Elektroteh. vestn., 2001, let. 68, št. 1, str. 70-73, ilustr. [COBISS-ID 2227284]
9. BÜRMEN, Arpad, BRATKOVIÈ, Franc, PUHAN, Janez, FAJFAR, Iztok, TUMA, Tadej. Extended global convergence framework for unconstrained optimization. Acta math. Sin., Engl. ser. (Print), 2004, vol. 20, no. 3, str. 433-440. [COBISS.SI-ID 4354388]
10. BÜRMEN, Arpad, PUHAN, Janez, TUMA, Tadej. Parallel sizing of robust analog ICs Inf. MIDEM, 2004, letn. 34, št. 2, str. 88-94. [COBISS.SI-ID 4435796]
11. NUSSDORFER, Andrej, BÜRMEN, Arpad, PUHAN, Janez, TUMA, Tadej. On cost function properties in analog circuit optimization. Inf. MIDEM, 2004, letn. 34, št. 2, pp. 95-101. [COBISS.SI-ID 4435540]
12. BÜRMEN, Arpad, PUHAN, Janez, TUMA, Tadej. Grid Restrained Nelder-Mead Algorithm. Computational optimization and applications, 2006, [Online ed.], [17] pp. [COBISS.SI-ID 5222996]
13. OLENŠEK, Jernej, PUHAN, Janez, BÜRMEN, Arpad, TOMAŽIÈ, Sašo, TUMA, Tadej. Optimization of integrated circuits by means of simulated annealing. Inf. MIDEM, 2006, letn. 36, št. 2, str. 79-84. [COBISS.SI-ID 5617492]
14. WAGNER, Borut, BÜRMEN, Arpad, PUHAN, Janez, TOMAŽIÈ, Sašo, TUMA, Tadej. Application of extrapolation algorithms in nonlinear circuit simulation and optimization with SPICE OPUS. Inf. MIDEM, 2006, letn. 36, št. 3, str. 140-147. [COBISS.SI-ID 5674580]
15. PUHAN, Janez, BÜRMEN, Arpad, TOMAŽIÈ, Sašo, TUMA, Tadej. Cost function definition for robust optimisation of operational amplifier. Inf. MIDEM, 2007, letn. 37, št. 3, str. 189-194, ilustr. [COBISS.SI-ID 6542676]
16. BÜRMEN, Arpad, TUMA, Tadej. Sprouting search - an algorithmic framework for asynchronous parallel unconstrained optimization. Optimization methods & software, 2007, vol. 22, no. 5, str. 755-776. [COBISS.SI-ID 6019668]
17. BÜRMEN, Arpad, TUMA, Tadej, FAJFAR, Iztok. A combined simplex-trust-region method for analog circuit optimization. J. circuits syst. comput., 2008, vol. 17, no. 1, str. 123-140, ilustr. [COBISS.SI-ID 6571092]
18. OLENŠEK, Jernej, BÜRMEN, Arpad, PUHAN, Janez, TUMA, Tadej. DESA : a new hybrid global optimization method and its application to analog integrated circuit sizing. J. glob. optim., 2008, str. [1-25], ilustr. [COBISS.SI-ID 6614100]