


ESCHER(1)						ESCHER(1)



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     escher - interactive schematics entry program

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     escher [ [-a<number>][-d <device>][-e]
	      [-l][-m][-n][-p<string>][-q<number>]
	      [-s<number>][-t<string>]
	      [-u<number>][-w][-z<number>] ]
	    [<template name>]

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     _E_s_c_h_e_r recognizes the following options:

     -a   Autosave.  An  autosave  is  performed  every  <number>
	  minutes.  Default: no autosave.

     -d   Select graphics device /dev/<device>..

     -e   Suppress the default name when selecting change name.

     -l   Do not display the line edit menu.

     -m   Interchange the meaning of mirror_x and mirror_y.

     -n   Enforce the displaying of  all  terminal  and  instance
	  names.

     -p   Provide default plot options.

     -q   Set the minimum time for the display of error messages.
	  Default: 2 seconds.

     -s   <number> is the maze on the grid to which all input  is
	  rounded.   Only valid in the circuit area.  Default: 4.
	  May be set to 1, 2 or 4 only.

     -t   <string> will be used as the default basename for  ter-
	  minals  used	by  the  add and copy commands.  Default:
	  "term".

     -u   Depth of the undo stack. Number is the <number> of com-
	  mands that can be undone.  Default: 10.

     -w   Permit wires to run along instances.

     -z   Error messages are replaced  by  the	current  template
	  name after 10 seconds.  Replace 10 by <number>.

     The options are read with the function getopt(3).	 See  the
     manual page for syntax of the options.  An unknown option or
     an option requiring an argument but has none  or  an  option
     with  an  incorrect  syntax  for  number  or  resulting in a



		   The Nelsis IC Design System			1






ESCHER(1)						ESCHER(1)



     negative number will give an error  message  on  stderr  and
     cause  an	immediate  termination of the program.	The first
     template to be edited can be given as an argument.

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     A	library  project  with	(default)  primitive  cells  like
     transistors, resistors, capacitors and simple logic gates is
     contained by ICDPATH/lib/escher.  To use  cells  (templates)
     from  this  project,  the cells should have been imported in
     the current project directory with _a_d_d_p_r_o_j and _i_m_p_c_e_l_l  (see
     corresponding manual pages).

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     See ESCHER reference manual.

CCCCOOOONNNNTTTTRRRRIIIIBBBBUUUUTTTTEEEEDDDD BBBBYYYY
     Arie Lodder and Mart van Stiphout.

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     ESCHER reference manual.



































2		   The Nelsis IC Design System



