








                    Information for ARK Logic Chipset Users

                  Harm Hanemaayer (H.Hanemaayer@inter.nl.net)

                                17 January 1997



1.  Supported chipsets

The "ark" driver in the SVGA server is for ARK Logic graphics chipsets.  The
following chipsets are supported:

      ARK1000PV (ark1000pv)
            Chipset with 32-bit DRAM interface, supports fast DRAM timing, for
            VESA and PCI bus. Has powerful "coprocessor" for graphics accelera-
            tion.  The max supported resolution/refresh depends on the RAMDAC
            used on the card; expect 256 colors up to 80 or 110 MHz dot clock;
            16bpp is also supported, as is 24bpp (packed).

      ARK1000VL (ark1000vl)
            Older chip, VLB only. More or less compatible with ARK1000PV.  It
            has is not been tested. You may have to disable acceleration and
            linear addressing.

      ARK2000PV (ark2000pv)
            64-bit version of the ARK1000PV. Note that an ARK2000PV equipped
            with 1Mb of DRAM is about equivalent to the same card with an
            ARK1000PV chip; 2Mb is required for 64-bit operation. Again the
            RAMDAC used on the card determines the max supported dot clocks. At
            8bpp, multiplexing over a 16-bit RAMDAC path is not yet supported
            so expect dot clocks up to 110 MHz; 16bpp and 32bpp are supported,
            as well as experimental packed 24bpp, depending on the RAMDAC.

      ARK2000MT (ark2000mt)
            This is a newer chip, compatible with the AR2000PV.

The ARK2000MI is not yet supported.

The chipset may not be detected automatically. In this case use a line like
Chipset "ark1000pv" in the Device section of the XF86Config file. Any options
must also be specified in this section.


2.  Supported RAMDACs

If no RAMDAC is specified, a standard RAMDAC supporting 256 colors up to 80 MHz
dot clock frequency is assumed. The following RAMDAC types can be specified in
the Device section of the XF86Config file (e.g.  Ramdac "att20c490"):

      att20c490
            Industry-standard 8-bit RAMDAC. The RAMDAC used on the basic


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            Hercules Stingray Pro is compatible. 16bpp color depth is supported
            up to 40 or 55 MHz, depending on the DAC speed rating. Packed 24bpp
            is supported up to about 36 MHz.

      att20c498
            Industry-standard 16-bit RAMDAC. The RAMDAC used on the Hercules
            Stingray Pro/V and the Stingray 64/V is compatible. 16bpp is sup-
            ported up to 80 MHz or 110 MHz dot clock frequency, 32bpp is sup-
            ported up to 40 or 55 MHz.

      zoomdac
            This is the actual DAC used by the Hercules Stingray Pro/V and
            64/V.  It is treated mostly as an ATT20C498, but with dot clock
            limits set correctly (16bpp up to 55 MHz with ARK1000PV, up to at
            least 110 MHz with ARK2000PV). In addition, packed 24bpp is sup-
            ported (up to 36 MHz with ARK1000PV, not yet on the ARK2000PV), and
            32bpp is also supported on the ARK2000PV (up to 55 MHz) This RAMDAC
            should be auto-detected.

      stg1700
            Completely untested.

      ics5342
            This is a clockchip/RAMDAC combination and is used on the Diamond
            Stealth 64 Graphics 2001 and newer Hercules cards that use the
            ARK2000MT. It is supported at 16bpp and 32bpp in addition to 256
            color mode. 32bpp mode may not work.

The Dacspeed keyword can be used to indicate the speed rating of the RAMDAC,
but it must be used with care. The raw clock frequency may exceed 80 MHz.  Both
the ARK chips and some of the RAMDACs are specified for raw speeds up to 120
MHz, but this might violate FCC regulations or otherwise be unstable.  High dot
clock 8bpp modes (e.g. 135 MHz) are normally achieved by sending 2 pixels at at
time over a 16-bit DAC path (the raw clock would be 67.5 MHz for 135 MHz dot
clock), a mode of operation that is not yet supported by this driver. No high-
dot clock configurations have been tested.

The driver now limits the maximum dot clocks according to the DRAM speed (band-
width). Because it is not possible to determine the memory clock speed (except
on the ICS5342), the driver assumes a default of 60 MHz.  On an ARK1000PV, that
allows 8bpp up to 109 MHz, 16bpp up to 55 MHz, 24bpp up to 36 MHz, and 32bpp up
to 27 MHz. On an ARK2000PV with 2MB memory, it allows 16bpp up to 110 MHz,
24bpp up to 72 MHz, and 32bpp up to 55 MHz. If you know what your real memory
clock is, you can specify it with the MCLK keyword, for example MCLK 70.

To run XF86_SVGA at 16 bpp, pass options to the X server as follows:

     startx -- -bpp 16               5-6-5 RGB ('64K color', XGA)
     startx -- -bpp 16 -weight 555   5-5-5 RGB ('Hicolor')
     startx -- -bpp 24        8-8-8 RGB (packed 24-bit truecolor)
     startx -- -bpp 32        8-8-8 RGB (32-bit pixel truecolor)











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3.  Acceleration

The driver takes full advantage of the new XAA (XFree86 Acceleration Architec-
ture) in the SVGA server. In fact the ARK driver was the initial XAA develop-
ment platform. Most common graphics operations are accelerated, including most
types of rectangular and non-rectangular filling, screen-to-screen BitBLTs,
line drawing, and text and bitmap expansion. Expect over 300k xstones on a 2MB
ARK2000PV/MT.

At 24bpp, acceleration is less complete, but curiously, greyscale colors permit
faster drawing. If you suspect a problem with acceleration, use the "noaccel"
option. If text or bitmaps do not seem to be rendered correctly, you could try
the "xaa_no_col_exp" option. To disable the pixmap cache, use
"no_pixmap_cache".

The hardware cursor is disabled by default. With unmodified mode timings, there
used to be two horizontal lines and a band following the mouse pointer over the
screen. The driver now automatically modifies the mode timing to eliminate this
effect; this has not been tested on all possible configurations. Use the
"hw_cursor" option to enable the hardware cursor.

Linear addressing is the default mode of operation. If the server does not
start correctly, you may want to try the "no_linear" option.

The older ARK1000VL is probably not compatible with acceleration. Use the
"noaccel" and "no_linear" options.


4.  Basic configuration

It is recommended that you generate an XF86Config file using the `XF86Setup' or
`xf86config' programs, which should produce a working high-resolution 8bpp con-
figuration, although the modelines might need reshuffling for optimal screen
refresh. You may want to include mode timings in the Monitor section that bet-
ter fit your monitor (e.g. 1152x864 modes).

In order to prevent stress on your monitor, it is recommended that you turn off
your monitor during clock probing (X -probeonly), which also happens if you
start the server with no Clocks line present in the Device section of the
XF86Config. The following Clocks line can be used for the Hercules Stingray
Pro, Pro/V and older 64/V using an ARK Logic clock generator (so there's no
need to probe clocks for this card, just insert the following line in the
Device section of the XF86Config file):

         Clocks 25.175 28.3 40 72 50 77 36 44.9
         Clocks 128.43 118.8 80 31.5 110 63.96 74.19 95


The higher frequencies have not been tested, there might be a mismatch in the
60-80 MHz range.












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5.  Features that may be expected in upcoming beta releases

   o Support for high dot clocks (>80 MHz, up to 135 MHz) at 8bpp by sending
     two pixels at a time over a 16-bit RAMDAC path on an ARK2000PV/MT with
     supported RAMDAC.

   o Support for packed-24bpp mode up to 72 MHz on an ARK2000PV with ZoomDAC.

   o The acceleration may be further optimized and stabilized.

   o Existing problems may be fixed.

   o Support for the ARK2000MI, if it materializes.


6.  Tested configurations.

      Hercules Stringray Pro (ARK1000PV + ATT20C490-compatible RAMDAC)
            Supported at 8bpp, 16bpp and 24bpp. Fixed set of clocks.  There
            seems to be a restriction to the mode timings at 24bpp; the last
            horizontal number (HTotal) must be divisible by 4 but not by 8. If
            the modeline is wrong, the colors would be incorrect. The driver
            automatically corrects the mode timing.

      Hercules Stingray Pro/V (ARK1000PV + IC Works ZoomDAC)
            Supported at 8bpp, 16bpp and 24bpp. Fixed set of clocks.  The same
            restrictions above exist for the 24bpp mode. Problems with textmode
            restoration have been reported on some OS's.

      Hercules Stingray 64/V (ARK2000PV + IC Works ZoomDAC)
            Supported at 8bpp, 16bpp and 32bpp. Fixed set of clocks.  Problems
            with textmode restoration have been reported on some OS's.

      Hercules Stingray 64 with ARK2000MT + ICS5342 Clockchip/RAMDAC
            This may also apply to other cards with the ICS5342, such as the
            Diamond Stealth 64 Graphics 2001. Use RAMDAC "ics5342".  Pro-
            grammable clockchip (don't specify any Clocks lines).  Supported at
            8bpp, 16bpp and 32bpp. 32bpp has been reported not to work. This
            configuration has not been tested with a post-3.2 server.

If are having driver-related problems that are not addressed by this document,
you can try contacting the XFree86 team (the current driver maintainer can be
reached at H.Hanemaayer@inter.nl.net), or post in the Usenet newsgroup
comp.windows.x.i386unix.

In fact, reports (success or failure) are very welcome, especially on configu-
rations that have not been tested. You can do this via the bug report form
<URL:http://www.xfree86.org/cgi-bin/bugform.cgi> (or send mail to
XFree86@XFree86.org). You may want to keep an eye on forthcoming beta releases
at the XFree86 web site <URL:http://www.xfree86.org>.












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     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/ark.sgml,v 3.9 1997/01/25 03:22:20 dawes Exp $





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                                   CONTENTS



1. Supported chipsets  ...................................................... 1

2. Supported RAMDACs  ....................................................... 1

3. Acceleration  ............................................................ 3

4. Basic configuration  ..................................................... 3

5. Features that may be expected in upcoming beta releases  ................. 4

6. Tested configurations.  .................................................. 4









































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