AS(1)

NAME
AS - the portable GNU assembler.

SYNOPSIS
as [ -a[cdhlns][=file] ] [ -D ] [ --defsym sym=val ]
 [ -f ] [ --gstabs ] [ --gdwarf2 ] [ --help ] [ -I dir ]
 [ -J ] [ -K ] [ -L ]
 [ --listing--lhs-width=NUM ][ --listing-lhs-width2=NUM ]
 [ --listing-rhs-width=NUM ][ --listing-cont-lines=NUM ]
 [ --keep-locals ] [ -o objfile ] [ -R ] [ --statistics ] [ -v ]
 [ -version ] [ --version ] [ -W ] [ --warn ] [ --fatal-warnings ]
 [ -w ] [ -x ] [ -Z ] [ --target-help ]
 [ -marc[5|6|7|8] ]
 [ -EB | -EL ]
 [ -m[arm]1 | -m[arm]2 | -m[arm]250 | -m[arm]3 |
   -m[arm]6 | -m[arm]60 | -m[arm]600 | -m[arm]610 |
   -m[arm]620 | -m[arm]7[t][[d]m[i]][fe] | -m[arm]70 |
   -m[arm]700 | -m[arm]710[c] | -m[arm]7100 |
   -m[arm]7500 | -m[arm]8 | -m[arm]810 | -m[arm]9 |
   -m[arm]920 | -m[arm]920t | -m[arm]9tdmi |
   -mstrongarm | -mstrongarm110 | -mstrongarm1100 ]
 [ -m[arm]v2 | -m[arm]v2a | -m[arm]v3 | -m[arm]v3m |
   -m[arm]v4 | -m[arm]v4t | -m[arm]v5 | -[arm]v5t |
   -[arm]v5te ]
 [ -mthumb | -mall ]
 [ -mfpa10 | -mfpa11 | -mfpe-old | -mno-fpu ]
 [ -EB | -EL ]
 [ -mapcs-32 | -mapcs-26 | -mapcs-float |
   -mapcs-reentrant ]
 [ -mthumb-interwork ] [ -moabi ] [ -k ]
 [ -O ]
 [ -O | -n | -N ]
 [ -mb | -me ]
 [ -Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite
   -Av8plus | -Av8plusa | -Av9 | -Av9a ]
 [ -xarch=v8plus | -xarch=v8plusa ] [ -bump ]
 [ -32 | -64 ]
 [ -ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB |
   -AKC | -AMC ]
 [ -b ] [ -no-relax ]
 [ --m32rx | --[no-]warn-explicit-parallel-conflicts |
   --W[n]p ]
 [ -l ] [ -m68000 | -m68010 | -m68020 | ... ]
 [ -jsri2bsr ] [ -sifilter ] [ -relax ]
 [ -mcpu=[210|340] ]
 [ -m68hc11 | -m68hc12 ]
 [ --force-long-branchs ] [ --short-branchs ]
 [ --strict-direct-mode ] [ --print-insn-syntax ]
 [ --print-opcodes ] [ --generate-example ]
 [ -nocpp ] [ -EL ] [ -EB ] [ -G num ] [ -mcpu=CPU ]
 [ -mips1 ] [ -mips2 ] [ -mips3 ] [ -mips4 ] [ -mips5 ]
 [ -mips32 ] [ -mips64 ]
 [ -m4650 ] [ -no-m4650 ]
 [ --trap ] [ --break ] [ -n ]
 [ --emulation=name ]
 [ -- | files ... ]

DESCRIPTION
GNU "as" is really a family of assemblers. If you use (or have used) the GNU assembler on one architecture, you should find a fairly similar environment when you use it on another architecture. Each version has much in common with the others, including object file formats, most assembler directives (often called pseudo-ops) and assembler syntax.

"as" is primarily intended to assemble the output of the GNU C compiler for use by the linker . Nevertheless, we've tried to make "as" assemble correctly everything that other assemblers for the same machine would assemble. Any exceptions are documented explicitly. This doesn't mean "as" always uses the same syntax as another assembler for the same architecture; for example, we know of several incompatible versions of 680x0 assembly language syntax.

Each time you run "as" it assembles exactly one source program. The source program is made up of one or more files. (The standard input is also a file.)

You give "as" a command line that has zero or more input file names. The input files are read (from left file name to right). A command line argument (in any position) that has no special meaning is taken to be an input file name.

If you give "as" no file names it attempts to read one input file from the "as" standard input, which is normally your terminal. You may have to type ctl-D to tell "as" there is no more program to assemble.

Use -- if you need to explicitly name the standard input file in your command line.

If the source is empty, "as" produces a small, empty object file.

"as" may write warnings and error messages to the standard error file (usually your terminal). This should not happen when a compiler runs "as" automatically. Warnings report an assumption made so that "as" could keep assembling a flawed program; errors report a grave problem that stops the assembly.

If you are invoking "as" via the GNU C compiler (version 2), you can use the -Wa option to pass arguments through to the assembler. The assembler arguments must be separated from each other (and the -Wa) by commas. For example:

        gcc -c -g -O -Wa,-alh,-L file.c
This passes two options to the assembler: -alh (emit a listing to standard output with with high-level and assembly source) and -L (retain local symbols in the symbol table).

Usually you do not need to use this -Wa mechanism, since many compiler command-line options are automatically passed to the assembler by the compiler. (You can call the GNU compiler driver with the -v option to see precisely what options it passes to each compilation pass, including the assembler.)

OPTIONS
Turn on listings, in any of a variety of ways:
    omit false conditionals omit debugging directives include high-level source include assembly include macro expansions omit forms processing include symbols set the name of the listing file

    You may combine these options; for example, use -aln for assembly listing without forms processing. The =file option, if used, must be the last one. By itself, -a defaults to -ahls.
Ignored. This option is accepted for script compatibility with calls to other assemblers. Define the symbol sym to be value before assembling the input file. value must be an integer constant. As in C, a leading 0x indicates a hexadecimal value, and a leading 0 indicates an octal value. ``fast''---skip whitespace and comment preprocessing (assume source is compiler output). Generate stabs debugging information for each assembler line. This may help debugging assembler code, if the debugger can handle it. Generate DWARF2 debugging information for each assembler line. This may help debugging assembler code, if the debugger can handle it. Note - this option is only supported by some targets, not all of them. Print a summary of the command line options and exit. Print a summary of all target specific options and exit. Add directory dir to the search list for ".include" directives. Don't warn about signed overflow. This option is accepted but has no effect on the TARGET family. Keep (in the symbol table) local symbols. On traditional a.out systems these start with L, but different systems have different local label prefixes. Set the maximum width, in words, of the output data column for an assembler listing to number. Set the maximum width, in words, of the output data column for continuation lines in an assembler listing to number. Set the maximum width of an input source line, as displayed in a listing, to number bytes. Set the maximum number of lines printed in a listing for a single line of input to number + 1. Name the object-file output from "as" objfile. Fold the data section into the text section. Print the maximum space (in bytes) and total time (in seconds) used by assembly. Remove local absolute symbols from the outgoing symbol table. Print the "as" version. Print the "as" version and exit. Suppress warning messages. Treat warnings as errors. Don't suppress warning messages or treat them as errors. Ignored. Ignored. Generate an object file even after errors. Standard input, or source files to assemble.

The following options are available when as is configured for an ARC processor. This option selects the core processor variant. Select either big-endian (-EB) or little-endian (-EL) output.

The following options are available when as is configured for the ARM processor family. Specify which ARM processor variant is the target. Specify which ARM architecture variant is used by the target. Enable or disable Thumb only instruction decoding. Select which Floating Point architecture is the target. Select which procedure calling convention is in use. Select either big-endian (-EB) or little-endian (-EL) output. Specify that the code has been generated with interworking between Thumb and ARM code in mind. Specify that PIC code has been generated.

The following options are available when as is configured for a D10V processor. Optimize output by parallelizing instructions.

The following options are available when as is configured for a D30V processor. Optimize output by parallelizing instructions. Warn when nops are generated. Warn when a nop after a 32-bit multiply instruction is generated.

The following options are available when as is configured for the Intel 80960 processor. Specify which variant of the 960 architecture is the target. Add code to collect statistics about branches taken. Do not alter compare-and-branch instructions for long displacements; error if necessary.

The following options are available when as is configured for the Mitsubishi M32R series. Specify which processor in the M32R family is the target. The default is normally the M32R, but this option changes it to the M32RX. Produce warning messages when questionable parallel constructs are encountered. Do not produce warning messages when questionable parallel constructs are encountered.

The following options are available when as is configured for the Motorola 68000 series. Shorten references to undefined symbols, to one word instead of two. Specify what processor in the 68000 family is the target. The default is normally the 68020, but this can be changed at configuration time. The target machine does (or does not) have a floating-point coprocessor. The default is to assume a coprocessor for 68020, 68030, and cpu32. Although the basic 68000 is not compatible with the 68881, a combination of the two can be specified, since it's possible to do emulation of the coprocessor instructions with the main processor. The target machine does (or does not) have a memory-management unit coprocessor. The default is to assume an MMU for 68020 and up.

For details about the PDP-11 machine dependent features options, see @ref{PDP-11-Options}. Generate position-independent (or position-dependent) code. The default is "-mpic". Enable all instruction set extensions. This is the default. Disable all instruction set extensions. Enable (or disable) a particular instruction set extension. Enable the instruction set extensions supported by a particular CPU, and disable all other extensions. Enable the instruction set extensions supported by a particular machine model, and disable all other extensions.

The following options are available when as is configured for a picoJava processor. Generate ``big endian'' format output. Generate ``little endian'' format output.

The following options are available when as is configured for the Motorola 68HC11 or 68HC12 series. Specify what processor is the target. The default is defined by the configuration option when building the assembler. Relative branches are turned into absolute ones. This concerns conditional branches, unconditional branches and branches to a sub routine. Do not turn relative branchs into absolute ones when the offset is out of range. Do not turn the direct addressing mode into extended addressing mode when the instruction does not support direct addressing mode. Print the syntax of instruction in case of error. print the list of instructions with syntax and then exit. print an example of instruction for each possible instruction and then exit. This option is only useful for testing "as".

The following options are available when "as" is configured for the SPARC architecture: Explicitly select a variant of the SPARC architecture.

-Av8plus and -Av8plusa select a 32 bit environment. -Av9 and -Av9a select a 64 bit environment.

-Av8plusa and -Av9a enable the SPARC V9 instruction set with UltraSPARC extensions. For compatibility with the Solaris v9 assembler. These options are equivalent to -Av8plus and -Av8plusa, respectively. Warn when the assembler switches to another architecture.

The following options are available when as is configured for a MIPS processor. This option sets the largest size of an object that can be referenced implicitly with the "gp" register. It is only accepted for targets that use ECOFF format, such as a DECstation running Ultrix. The default value is 8. Generate ``big endian'' format output. Generate ``little endian'' format output. Generate code for a particular MIPS Instruction Set Architecture level. -mips1 corresponds to the R2000 and R3000 processors, -mips2 to the R6000 processor, and -mips3 to the R4000 processor. -mips5, -mips32, and -mips64 correspond to generic MIPS V, MIPS32, and MIPS64 ISA processors, respectively. Generate code for the MIPS R4650 chip. This tells the assembler to accept the mad and madu instruction, and to not schedule nop instructions around accesses to the HI and LO registers. -no-m4650 turns off this option. Generate code for a particular MIPS cpu. It is exactly equivalent to -mcpu, except that there are more value of cpu understood. This option causes "as" to emulate "as" configured for some other target, in all respects, including output format (choosing between ELF and ECOFF only), handling of pseudo-opcodes which may generate debugging information or store symbol table information, and default endianness. The available configuration names are: mipsecoff, mipself, mipslecoff, mipsbecoff, mipslelf, mipsbelf. The first two do not alter the default endianness from that of the primary target for which the assembler was configured; the others change the default to little- or big-endian as indicated by the b or l in the name. Using -EB or -EL will override the endianness selection in any case.

This option is currently supported only when the primary target "as" is configured for is a MIPS ELF or ECOFF target. Furthermore, the primary target or others specified with --enable-targets=... at configuration time must include support for the other format, if both are to be available. For example, the Irix 5 configuration includes support for both.

Eventually, this option will support more configurations, with more fine-grained control over the assembler's behavior, and will be supported for more processors. "as" ignores this option. It is accepted for compatibility with the native tools. Control how to deal with multiplication overflow and division by zero. --trap or --no-break (which are synonyms) take a trap exception (and only work for Instruction Set Architecture level 2 and higher); --break or --no-trap (also synonyms, and the default) take a break exception. When this option is used, "as" will issue a warning every time it generates a nop instruction from a macro.

The following options are available when as is configured for an MCore processor. Enable or disable the JSRI to BSR transformation. By default this is enabled. The command line option -nojsri2bsr can be used to disable it. Enable or disable the silicon filter behaviour. By default this is disabled. The default can be overridden by the -sifilter command line option. Alter jump instructions for long displacements. Select the cpu type on the target hardware. This controls which instructions can be assembled. Assemble for a big endian target. Assemble for a little endian target.

SEE ALSO
gcc(1), ld(1), and the Info entries for binutils and ld.

COPYRIGHT
Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001 Free Software Foundation, Inc.

Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.1 or any later version published by the Free Software Foundation; with no Invariant Sections, with no Front-Cover Texts, and with no Back-Cover Texts. A copy of the license is included in the section entitled "GNU Free Documentation License".